The DS90UB962-Q1 8 GPIO pins can output data received from the forward channel when paired with the DS90UB935-Q1 serializer. The remote Serializer GPIO are mapped to GPIO. Each GPIO pin can be programmed for output mode and mapped. Up to four GPIOs are supported in the forward direction on each FPD-Link III Receive port. Each forward channel GPIO (from any port) can be mapped to any GPIO output pin. The DS90UB933-Q1 and DS90UB913A-Q1 GPIO’s cannot be configured as inputs for remote communication over the forward channel to the DS90UB962-Q1.

The timing for the forward channel GPIO is dependant on the number of GPIOs assigned at the serializer. When a single GPIO input from the DS90UB935-Q1 serializer is linked to a DS90UB962-Q1 deserializer GPIO output the value is sampled every forward channel transmit frame. Two linked GPIO are sampled every two forward channel frames and 3-linked or 4-linked GPIOs are sampled every 5 frames. The minimum latency for the GPIO remains consistent (approximately 225 ns), but as the information spreads over multiple frames, the jitter typically increases on the order of the sampling period (number of forward channel frames). TI recommends maintaining a 4x oversampling ratio for linked GPIO throughput. For example, when operating in 4-Gbps synchronous mode with REFCLK = 25 MHz, the maximum recommended GPIO input frequency based on the number of GPIO linked over the forward channel is shown in Table 7-11.

In addition to mapping remote serializer GPI, an internally generated FrameSync (see Section 7.4.24) or other control signals may be output from any of the deserializer GPIOs for synchronization with a local processor or another deserializer.