米6体育平台手机版

ZHCSHP1A February 2018 – April 2018 ESD204

PRODUCTION DATA.

At T_A = 25°C unless otherwise noted

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_RWM	Reverse stand-off voltage	I_IO < 10 nA, across operating temperature range	-3.6		3.6	V
V_BRF	Positive Breakdown Voltage, Each IO Pin to GND ⁽¹⁾	I_IO = 1 mA	5		7.9	V
V_BRR	Negative Breakdown Voltage, Each IO Pin to GND ⁽¹⁾	I_IO = -1 mA,	-7.9		-5	V
V_HOLD	Positive Holding Voltage, Each IO pin to GND ⁽²⁾	I_IO = 1 mA		6.2		V
V_HOLD-NEG	Negative Holding Voltage, Each IO pin to GND ⁽²⁾	I_IO = -1 mA		-6.2		V
V_CLAMP	Clamping voltage	Surge I_PP = 5.5 A, Each IO pin to GND, GND to Each IO pin, tp=8/20 μs		8.5		V
		TLP I_PP = 5 A, Each IO pin to GND, GND to Each IO pin, t_p=10/100 ns		8.2		V
		TLP I_PP = 16 A, Each IO pin to GND, GND to Each IO pin, t_p=10/100 ns		11.5		V
R_DYN	Dynamic resistance	Each IO Pin to GND, TLP t_p=10/100 ns		0.3		Ω
R_DYN	Dynamic resistance	GND to Each IO Pin, TLP t_p=10/100 ns		0.3		Ω
C_LINE	Line capacitance, any IO to GND	V_IO = 0 V, V_p-p = 30 mV, f = 1 MHz		0.55	0.65	pF
ΔC_LINE	Variation of line capacitance	C_LINE1- C_LINE2,V_IO = 0 V, Vp-p = 30 mV, f = 1 MHz		0.02	0.07	pF
C_CROSS	Line-to-line capacitance	V_IO = 0 V, V_rms = 30 mV, f = 1 MHz		0.25	0.35	pF

(1) V_BRF and V_BRR are defined as the voltage obtained at 1 mA when sweeping the voltage up, before the device latches into the snapback state

(2) VHOLD is defined as the voltage when 1 mA is applied, after the device has successfully latched into the snapback state.