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ZHCSUW2 February 2024 ESD652

PRODUCTION DATA

请参考 PDF 数据表获取器件具体的封装图。

5.6 Electrical Characteristics

At TA = 25°C unless otherwise noted

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_RWM	Reverse stand-off voltage	I_IO < 50nA	-18		18	V
I_LEAK	Leakage current at V_RWM	VIO = ±18V, I/O to GND		1	50	nA
V_BR	Breakdown voltage, I/O to GND ⁽¹⁾	I_IO = ±10mA	19		25	V
V_CLAMP	Surge clamping voltage, t_p = 8/20µs ⁽²⁾	I_PP = ±1A, I/O to GND		22	25	V
V_CLAMP	Surge clamping voltage, t_p = 8/20µs ⁽²⁾	I_PP = ±5.5A, I/O to GND		25	32	V
V_CLAMP	TLP clamping voltage, t_p = 100ns ⁽³⁾	I_PP = ±16A TLP, I/O to GND		28		V
R_DYN	Dynamic resistance ⁽⁴⁾	I/O to GND		0.32		Ω
R_DYN	Dynamic resistance ⁽⁴⁾	GND to I/O		0.32		Ω
C_LINE	Line capacitance, IO to GND	V_IO= 0V, f = 1MHz		4		pF

(1) V_BR is defined as the voltage obtained at 10mA when sweeping the voltage up, before the device latches into the snapback state

(2) Device stressed with 8/20µs exponential decay waveform according to IEC 61000-4-5

(3) Non-repetitive square wave current pulse, Transmission Line Pulse (TLP); ANSI / ESD STM5.5.1-2008

(4) Extraction of R_DYN using least squares fit of TLP characteristics between I = 10A and I = 20A