ZHCSF09A May 2016 – October 2024 FDC2112-Q1 , FDC2114-Q1 , FDC2212-Q1 , FDC2214-Q1
PRODUCTION DATA
The FDC is composed of front-end resonant circuit drivers, followed by a multiplexer that sequences through the active channels, connecting them to the core that measures and digitizes the sensor frequency (fSENSOR). The core uses a reference frequency (fREF) to measure the sensor frequency. fREF is derived from either an internal reference clock (oscillator), or an externally supplied clock. The digitized output for each channel is proportional to the ratio of fSENSOR/fREF. The I2C interface is used to support device configuration and to transmit the digitized frequency values to a host processor. The FDC can be placed in shutdown mode, saving current, using the SD pin. The INTB pin may be configured to notify the host of changes in system status.