ZHCSF09 May   2016 FDC2112-Q1 , FDC2114-Q1 , FDC2212-Q1 , FDC2214-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics - I2C
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Clocking Architecture
      2. 7.3.2 Multi-Channel and Single-Channel Operation
        1. 7.3.2.1 Gain and Offset (FDC2112, FDC2114 only)
      3. 7.3.3 Current Drive Control Registers
      4. 7.3.4 Device Status Registers
      5. 7.3.5 Input Deglitch Filter
    4. 7.4 Device Functional Modes
      1. 7.4.1 Start-Up Mode
      2. 7.4.2 Normal (Conversion) Mode
      3. 7.4.3 Sleep Mode
      4. 7.4.4 Shutdown Mode
        1. 7.4.4.1 Reset
    5. 7.5 Programming
      1. 7.5.1 I2C Interface Specifications
    6. 7.6 Register Maps
      1. 7.6.1  Register List
      2. 7.6.2  Address 0x00, DATA_CH0
      3. 7.6.3  Address 0x01, DATA_LSB_CH0 (FDC2212 / FDC2214 only)
      4. 7.6.4  Address 0x02, DATA_CH1
      5. 7.6.5  Address 0x03, DATA_LSB_CH1 (FDC2212 / FDC2214 only)
      6. 7.6.6  Address 0x04, DATA_CH2 (FDC2114, FDC2214 only)
      7. 7.6.7  Address 0x05, DATA_LSB_CH2 (FDC2214 only)
      8. 7.6.8  Address 0x06, DATA_CH3 (FDC2114, FDC2214 only)
      9. 7.6.9  Address 0x07, DATA_LSB_CH3 (FDC2214 only)
      10. 7.6.10 Address 0x08, RCOUNT_CH0
      11. 7.6.11 Address 0x09, RCOUNT_CH1
      12. 7.6.12 Address 0x0A, RCOUNT_CH2 (FDC2114, FDC2214 only)
      13. 7.6.13 Address 0x0B, RCOUNT_CH3 (FDC2114, FDC2214 only)
      14. 7.6.14 Address 0x0C, OFFSET_CH0 (FDC21112 / FDC2114 only)
      15. 7.6.15 Address 0x0D, OFFSET_CH1 (FDC21112 / FDC2114 only)
      16. 7.6.16 Address 0x0E, OFFSET_CH2 (FDC2114 only)
      17. 7.6.17 Address 0x0F, OFFSET_CH3 (FDC2114 only)
      18. 7.6.18 Address 0x10, SETTLECOUNT_CH0
      19. 7.6.19 Address 0x11, SETTLECOUNT_CH1
      20. 7.6.20 Address 0x12, SETTLECOUNT_CH2 (FDC2114, FDC2214 only)
      21. 7.6.21 Address 0x13, SETTLECOUNT_CH3 (FDC2114, FDC2214 only)
      22. 7.6.22 Address 0x14, CLOCK_DIVIDERS_CH0
      23. 7.6.23 Address 0x15, CLOCK_DIVIDERS_CH1
      24. 7.6.24 Address 0x16, CLOCK_DIVIDERS_CH2 (FDC2114, FDC2214 only)
      25. 7.6.25 Address 0x17, CLOCK_DIVIDERS_CH3 (FDC2114, FDC2214 only)
      26. 7.6.26 Address 0x18, STATUS
      27. 7.6.27 Address 0x19, ERROR_CONFIG
      28. 7.6.28 Address 0x1A, CONFIG
      29. 7.6.29 Address 0x1B, MUX_CONFIG
      30. 7.6.30 Address 0x1C, RESET_DEV
      31. 7.6.31 Address 0x1E, DRIVE_CURRENT_CH0
      32. 7.6.32 Address 0x1F, DRIVE_CURRENT_CH1
      33. 7.6.33 Address 0x20, DRIVE_CURRENT_CH2 (FDC2114 / FDC2214 only)
      34. 7.6.34 Address 0x21, DRIVE_CURRENT_CH3 (FDC2114 / FDC2214 only)
      35. 7.6.35 Address 0x7E, MANUFACTURER_ID
      36. 7.6.36 Address 0x7F, DEVICE_ID
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Sensor Configuration
      2. 8.1.2 Shield
      3. 8.1.3 Power-Cycled Applications
      4. 8.1.4 Inductor Self-Resonant Frequency
      5. 8.1.5 Application Curves for Proximity Sensing
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Performance Plot
      4. 8.2.4 Recommended Initial Register Configuration Values
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 社区资源
    4. 11.4 相关链接
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10 Layout

10.1 Layout Guidelines

  • Avoid long traces to connect the sensor to the FDC. Short traces reduce parasitic capacitances between sensor inductor and offer higher system performance.
  • Systems that require matched channel response need to have matched trace length on all active channels.

10.2 Layout Examples

Figure 62 to Figure 65 show the FDC2114 / FDC2214 evaluation module (EVM) layout.

FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 new_layer01_top_snoscz5.png Figure 62. Example PCB Layout: Top Layer (Signal)
FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 new_layer02_mid1_snoscz5.png Figure 63. Example PCB Layout: Mid-Layer 1 (GND)
FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 new_layer03_mid2_snoscz5.png Figure 64. Example PCB Layout: Mid-layer 2 (Power)
FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 new_layer04_bottom_snoscz5.png Figure 65. Example PCB Layout: Bottom Layer (Signal)
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