米6体育平台手机版

ZHCSF09 May 2016 FDC2112-Q1 , FDC2114-Q1 , FDC2212-Q1 , FDC2214-Q1

PRODUCTION DATA.

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
VDD	Supply voltage		5	V
Vi	Voltage on any pin	–0.3	VDD + 0.3	V
IA	Input current on any INx pin	–8	8	mA
ID	Input current on any digital pin	–5	5	mA
T_J	Junction temperature	–55	150	°C
T_stg	Storage temperature	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per AEC Q100-011	±750	V

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

Unless otherwise specified, all limits ensured for T_A = 25°C, VDD = 3.3 V

		MIN	NOM	MAX	UNIT
VDD	Supply voltage	2.7		3.6	V
T_A	Operating temperature	–40		125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		FDC2112 / FDC2212	FDC2214 / FDC2214	UNIT
		DNT (WSON)	RGH (WQFN)
		12 PINS	16 PINS
R_θJA	Junction-to-ambient thermal resistance	36.7	35.6	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	36.2	36.2	°C/W
R_θJB	Junction-to-board thermal resistance	14	13.4	°C/W
ψ_JT	Junction-to-top characterization parameter	0.4	0.4	°C/W
ψ_JB	Junction-to-board characterization parameter	14.2	13.4	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	3.5	3.5	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise specified, all limits ensured for T_A = 25°C, VDD = 3.3 V⁽¹⁾

PARAMETER		TEST CONDITIONS⁽²⁾	MIN⁽³⁾	TYP⁽⁴⁾	MAX⁽³⁾	UNIT
POWER
V_DD	Supply voltage	T_A = –40°C to 125°C	2.7		3.6	V
I_DD	Supply durrent (not including sensor current)⁽⁵⁾	CLKIN = 10MHz⁽⁶⁾		2.1		mA
I_DDSL	Sleep mode supply current⁽⁵⁾			35	60	µA
I_SD	Shutdown mode supply current⁽⁵⁾			0.2	1	µA
CAPACITIVE SENSOR
C_SENSORMAX	Maximum sensor capacitance	1-mH inductor, 10-kHz oscillation		250		nF
C_IN	Sensor pin parasitic capacitance			4		pF
N_BITS	Number of bits	FDC2112, FDC2114 RCOUNT ≥ 0x0400			12	bits
N_BITS	Number of bits	FDC2212, FDC2214 RCOUNT = 0xFFFF			28	bits
f_CS	Maximum channel sample rate	FDC2112, FDC2114 single active channel continuous conversion, SCL = 400 kHz			13.3	kSPS
f_CS	Maximum channel sample rate	FDC2212, FDC2214 single active channel continuous conversion, SCL= 400 kHz			4.08	kSPS
EXCITATION
f_SENSOR	Sensor excitation frequency	T_A = –40°C to 125°C	0.01		10	MHz
V_SENSORMIN	Minimum sensor oscillation amplitude (pk)⁽⁷⁾			1.2		V
V_SENSORMAX	Maximum sensor oscillation amplitude (pk)			1.8		V
I_SENSORMAX	Sensor maximum current drive	HIGH_CURRENT_DRV = b0 DRIVE_CURRENT_CH0 = 0xF800		1.5		mA
I_SENSORMAX	Sensor maximum current drive	HIGH_CURRENT_DRV = b1 DRIVE_CURRENT_CH0 = 0xF800 Channel 0 only		6		mA
MASTER CLOCK
f_CLKIN	External master clock input frequency (CLKIN)	T_A = –40°C to 125°C	2		40	MHz
CLKIN_{DUTY_MIN}	External master clock minimum acceptable duty cycle (CLKIN)			40%
CLKIN_{DUTY_MAX}	External master clock maximum acceptable duty cycle (CLKIN)			60%
V_{CLKIN_LO}	CLKIN low voltage threshold				0.3 V_DD	V
V_{CLKIN_HI}	CLKIN high voltage threshold		0.7 × V_DD			V
f_INTCLK	Internal master clock frequency range		35	43.4	55	MHz
T_{Cf_int_μ}	Internal master clock temperature coefficient mean			–13		ppm/°C

(1) Electrical Characteristics values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that T_J = T_A. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T_J > T_A. Absolute Maximum Ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.

(2) Register values are represented as either binary (b is the prefix to the digits), or hexadecimal (0x is the prefix to the digits). Decimal values have no prefix.

(3) Limits are ensured by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method.

(4) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.

(5) I2C read/write communication and pullup resistors current through SCL, SDA not included.

(6) Sensor capacitor: 1 layer, 20.9 × 13.9 mm, Bourns CMH322522-180KL sensor inductor with L=18 µH and 33 pF 1% COG/NP0 Target: Grounded aluminum plate (176 × 123 mm), Channel = Channel 0 (continuous mode) CLKIN = 40 MHz, CHx_FIN_SEL = b10, CHx_FREF_DIVIDER = b00 0000 0001 CH0_RCOUNT = 0xFFFF, SETTLECOUNT_CH0 = 0x0100, DRIVE_CURRENT_CH0 = 0x7800.

(7) Lower V_SENSORMIN oscillation amplitudes can be used, but will result in lower SNR.

6.6 Timing Requirements

		MIN	NOM	MAX	UNIT
t_SDWAKEUP	Wake-up time from SD high-low transition to I2C readback			2	ms
t_SLEEPWAKEUP	Wake-up time from sleep mode			0.05	ms
t_WD-TIMEOUT	Sensor recovery time (after watchdog timeout)		5.2		ms
I2C TIMING CHARACTERISTICS
f_SCL	Clock frequency	10		400	kHz
t_LOW	Clock low time	1.3			μs
t_HIGH	Clock high time	0.6			μs
t_HD;STA	Hold time (repeated) START condition: after this period, the first clock pulse is generated	0.6			μs
t_SU;STA	Setup time for a repeated START condition	0.6			μs
t_HD;DAT	Data hold time	0			μs
t_SU;DAT	Data setup time	100			ns
t_SU;STO	Setup time for STOP condition	0.6			μs
t_BUF	Bus free time between a STOP and START condition	1.3			μs
t_VD;DAT	Data valid time			0.9	μs
t_VD;ACK	Data valid acknowledge time			0.9	μs
t_SP	Pulse width of spikes that must be suppressed by the input filter⁽¹⁾			50	ns

6.7 Switching Characteristics - I2C

Unless otherwise specified, all limits ensured for T_A = 25°C, VDD = 3.3 V

PARAMETER		MIN	TYP	MAX	UNIT
VOLTAGE LEVELS
V_IH	Input high voltage	0.7 × V_DD			V
V_IL	Input low voltage			0.3 × V_DD	V
V_OL	Output low voltage (3 mA sink current)			0.4	V
HYS	Hysteresis		0.1 × V_DD		V

(1) This parameter is specified by design and/or characterization and is not tested in production.

FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 td_I2C_timing_snoscy9.gif

Figure 1. I2C Timing

6.8 Typical Characteristics

Common test conditions (unless specified otherwise): Sensor capacitor: 1 layer, 20.9 × 13.9 mm, Bourns CMH322522-180KL sensor inductor with L = 18 µH and 33 pF 1% COG/NP0 Target: Grounded aluminum plate (176 × 123 mm), Channel = Channel 0 (continuous mode) CLKIN = 40 MHz, CHx_FIN_SEL = b01, CHx_FREF_DIVIDER = b00 0000 0001 CH0_RCOUNT = 0xFFFF, SETTLECOUNT_CH0 = 0x0100, DRIVE_CURRENT_CH0 = 0x7800.