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ZHCSF09A May 2016 – October 2024 FDC2112-Q1 , FDC2114-Q1 , FDC2212-Q1 , FDC2214-Q1

PRODUCTION DATA

封装选项

机械数据 (封装 | 引脚)

RGH|16
- MPQF182B

散热焊盘机械数据 (封装 | 引脚)

RGH|16
- QFND440A

订购信息

6.3.1 Clocking Architecture

Figure 6-3 shows the clock dividers and multiplexers of the FDC.

FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 Clocking Diagram

A. FDC2114 / FDC2214 only

Figure 6-3 Clocking Diagram

In Figure 6-3, the key clocks are f_IN, f_REF, and f_CLK. f_CLK is selected from either the internal clock source or external clock source (CLKIN). The frequency measurement reference clock, f_REF, is derived from the f_CLK source. TI recommends that precision applications use an external controller clock that offers the stability and accuracy requirements needed for the application. The internal oscillator may be used in applications that require low cost and do not require high precision. The f_INx clock is derived from sensor frequency for a channel x, f_SENSORx. f_REFx and f_INx must meet the requirements listed in Table 6-1, depending on whether f_CLK (controller clock) is the internal or external clock.

Table 6-1 Clock Configuration Requirements

MODE⁽¹⁾	CLKIN SOURCE	VALID f_REFx RANGE (MHz)	VALID f_INx RANGE	SET CHx_FIN_SEL to ⁽²⁾	SET CHx_SETTLECOUNT to	SET CHx_RCOUNT to
Multi-channel	Internal	f_REFx ≤ 55	< f_REFx /4	Differential sensor configuration: b01: 0.01MHz to 8.75MHz (divide by 1) b10: 5MHz to 10MHz (divide by 2) Single-ended sensor configuration b10: 0.01MHz to 10MHz (divide by 2)	> 3	> 8
Multi-channel	External	f_REFx ≤ 40
Single-channel	Either external or internal	f_REFx ≤ 35

(1) Channels 2 and 3 are only available for FDC2114 and FDC2214.

(2) Refer to Sensor Configuration for information on differential and single-ended sensor configurations.

Table 6-2 shows the clock configuration registers for all channels.

Table 6-2 Clock Configuration Registers

CHANNEL⁽¹⁾	CLOCK	REGISTER	FIELD [ BIT(S) ]	VALUE
All	f_CLK = Controller Clock Source	CONFIG, addr 0x1A	REF_CLK_SRC [9]	b0 = internal oscillator is used as the controller clock b1 = external clock source is used as the controller clock
0	f_REF0	CLOCK_DIVIDERS_CH0, addr 0x14	CH0_FREF_DIVIDER [9:0]	f_REF0 = f_CLK / CH0_FREF_DIVIDER
1	f_REF1	CLOCK_DIVIDERS_CH1, addr 0x15	CH1_FREF_DIVIDER [9:0]	f_REF1 = f_CLK / CH1_FREF_DIVIDER
2	f_REF2	CLOCK_DIVIDERS_CH2, addr 0x16	CH2_FREF_DIVIDER [9:0]	f_REF2 = f_CLK / CH2_FREF_DIVIDER
3	f_REF3	CLOCK_DIVIDERS_CH3, addr 0x17	CH3_FREF_DIVIDER [9:0]	f_REF3 = f_CLK / CH3_FREF_DIVIDER
0	f_IN0	CLOCK_DIVIDERS_CH0, addr 0x14	CH0_FIN_SEL [13:12]	f_IN0 = f_SENSOR0 / CH0_FIN_SEL
1	f_IN1	CLOCK_DIVIDERS_CH1, addr 0x15	CH1_FIN_SEL [13:12]	f_IN1 = f_SENSOR1 / CH1_FIN_SEL
2	f_IN2	CLOCK_DIVIDERS_CH2, addr 0x16	CH2_FIN_SEL [13:12]	f_IN2 = f_SENSOR2 / CH2_FIN_SEL
3	f_IN3	CLOCK_DIVIDERS_CH3, addr 0x17	CH3_FIN_SEL [13:12]	f_IN3 = f_SENSOR3 / CH3_FIN_SEL

(1) Channels 2 and 3 are only available for FDC2114 and FDC2214