The design procedure for SFP/QSFP applications is as follows:

1. Determine the total number of ports in the system, N_ports, which require management through an FPC402 device. The minimum number of FPC402 devices required to support N_ports is ceiling{N_ports÷4}.
2. Determine which host-side control interface will be used to manage all FPC402 devices and all ports: I2C or SPI.
3. For I2C applications:
   1. Up to 14 FPC402 devices can share a single host-side I2C control bus. If more than 14 FPC402 devices are used, then more than one I2C control bus will be required.
   2. Take care to ensure the I2C clock (SCL) and data (SDA) lines do not exceed the maximum bus capacitance defined in Section 7.5. The bus capacitance will consist of the pin capacitance from each device connected plus the trace capacitance.
   3. Make sure appropriate pullup resistors are selected for the I2C clock (SCL) and data (SDA) lines.
4. For SPI applications:
   1. When using SPI for host-side communications, technically there is no limit to the number of FPC402 devices which can exist on the SPI chain. However, the user must be aware that for SPI communication, skew is introduced between the SCK and MISO lines due to the propagation delay of the data through all of the devices and trace and then back to the host. It is up to the user to ensure that SPI timings of the host are met after any skew due to propagation delay.
   2. Take care to ensure the SPI clock (SCK) and data (MOSI and MISO) lines do not exceed the maximum bus capacitance defined in Section 7.5. The bus capacitance will consist of the pin capacitance from each device connected plus the trace capacitance.
5. Route the low-speed inputs (IN_*[3:0]), outputs (OUT_*[3:0]), and I2C signals (MOD_SCL[3:0] / MOD_SDA[3:0]) from the FPC402 to the corresponding port, keeping all the signals for a given port grouped together. For example, if FPC402 port 2 is being used to control QSFP port 7, then all of low-speed signals of the QSFP port 7s , LED signals, and I2C signals must connect to FPC402 pins IN_*[2], OUT_*[2], and MOD_SCL[2]/MOD_SDA[2].
6. Use the spare GPIO[3:0] signals to control miscellaneous functions on the board, like enabling and disabling a power switch.
7. For applications requiring hot-plug between the FPC402 and the host controller, control the FPC402 enable signal (EN, pin 22) such that EN is deasserted low until VDD2 and the host-side control interface (I2C or SPI) is fully connected and stable.