Routing the high-speed differential signal traces on the top layer avoids the use of vias (and the introduction of their inductances) and allows for clean interconnects from the DisplayPort connectors to the repeater inputs and from the repeater output to the subsequent receiver circuit.
Placing a solid ground plane next to the high-speed signal layer establishes controlled impedance for transmission line interconnects and provides an excellent low-inductance path for the return current flow.
Decoupling capacitors must be placed next to each power terminal on the HD3SS213. Take care to minimize the stub length of the race connecting the capacitor to the power pin.
Avoid sharing vias between multiple decoupling capacitors.
Place vias as close as possible to the decoupling capacitor solder pad.
Widen VDD and/or GND planes to reduce effect if static and dynamic IR drop.