The high speed differential signals must be routed with great care to minimize signal quality degradation between the connector and the source or sink of the high speed signals by following the guidelines provided in this document. Depending on the configuration schemes, the speed of each differential pair can reach a maximum speed of 10Gbps. These signals are to be routed first before other signals with highest priority.
Make sure each differential pair is routed
together with controlled differential impedance of 85Ω to 90Ω and 50Ω common-mode
impedance. Keep away from other high speed signals. TI recommends to keep the number of
vias to a minimum. Separate each pair from adjacent pairs by at least 3 times the signal
trace width. Route all differential pairs on the same group of layers (outer layers or
inner layers) if not on the same layer. No 90 degree turns on any of the differential
pairs. If bends are used on high speed differential pairs, make sure the angle of the bend
is greater than 135 degrees.
Length matching:
Keep high speed differential pairs lengths within 5 mil of each other to keep the intra-pair skew minimum. The inter-pair matching of the differential pairs is not as critical as intra-pair matching.
Keep high speed differential pair traces adjacent to ground plane.
Do not route differential pairs over any plane split.
Place the ESD components on the high speed
differential lanes as close to the connector as possible in a pass through manner without
stubs on the differential path.
For ease of routing, the P and N connection of the USB3.1 differential pairs to the HD3SS3411-Q1 pins can be swapped.