8.2.1.2.1 Selecting R_S and R_L

In Figure 10, the value chosen for the shunt resistor, R_S, depends on the application and is a compromise between small-signal accuracy and maximum permissible voltage loss in the measurement line. High values of R_S provide better accuracy at lower currents by minimizing the effects of offset, while low values of R_S minimize voltage loss in the supply line. For most applications, best performance is attained with an R_S value that provides a full-scale shunt voltage range of 50 mV to 100 mV. Maximum input voltage for accurate measurements is 500 mV.

Choose an R_L that provides the desired full-scale output voltage. The output impedance of the INA1x8-Q1 OUT pin is very high, permitting the use of R_L values up to 500 kΩ with excellent accuracy. The input impedance of any additional circuitry at the output must be much higher than the value of R_L to avoid degrading accuracy.

Some ADCs have input impedances that significantly affects measurement gain. The input impedance of the ADC can be included as part of the effective R_L if the ADC input can be modeled as a resistor to ground. Alternatively, an op amp can be used to buffer the ADC input, as shown in Figure 10. The INA1x8-Q1 are current output devices, and as such, have an inherently large output impedance. The output currents from the amplifier are converted to an output voltage using the load resistor, R_L, connected from the amplifier output to ground. The ratio of the load resistor value to that of the internal resistor value determines the voltage gain of the system.

In many applications, digitizing the output of the INA1x8-Q1 is required. Digitizing is accomplished by connecting the output of the amplifier to an ADC. It is very common for an ADC to have a dynamic input impedance. If the INA1x8-Q1 output is connected directly to an ADC input, the input impedance of the ADC is effectively connected in parallel with gain setting resistor R_L. This parallel impedance combination affects the gain of the system and the impact on the gain is difficult to estimate accurately. A simple solution that eliminates the paralleling of impedances, and simplifies the gain of the circuit is to place a buffer amplifier, such as the OPA340, between the output of the INA1x8-Q1 and the input to the ADC.

Figure 10 illustrates this concept. Notice that a low-pass filter is placed between the OPA340 output and the input to the ADC. The filter capacitor is required to provide any instantaneous demand for current required by the input stage of the ADC. The filter resistor is required to isolate the OPA340 output from the filter capacitor in order to maintain circuit stability. The values for the filter components vary according to the operational amplifier used for the buffer and the particular ADC selected. More information regarding the design of the low-pass filter is found in the TI Precision Design, 16 bit 1MSPS Data Acquisition Reference Design for Single-Ended Multiplexed Applications.

Figure 11 shows the expected results when driving an ADC at 1 MSPS with and without buffering the INA1x8-Q1 output. Without the buffer, the high impedance of the INA1x8-Q1 reacts with the input capacitance and sample-and-hold capacitance of the ADC, and does not allow the sampled value to reach the correct final value before the ADC is reset, and the next conversion starts. Adding the buffer amplifier significantly reduces the output impedance driving the sample-and-hold circuitry, and allows for higher conversion rates.