ZHCSFV5B December   2016  – November 2018 INA1650 , INA1651

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
    1.     INA165x 简化内部原理图
  3. 3 说明
    1.     CMRR 直方图（5746 通道）
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics:
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Audio Signal Path
      2. 7.3.2 Supply Divider
      3. 7.3.3 Electrical Overstress
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Single-Supply Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input Common-Mode Range
      2. 8.1.2 Common-Mode Input Impedance
      3. 8.1.3 Start-Up Time in Single-Supply Applications
      4. 8.1.4 Input AC Coupling
      5. 8.1.5 Supply Divider Capacitive Loading
    2. 8.2 Typical Applications
      1. 8.2.1 Line Receiver for Differential Audio Signals in a Split-Supply System
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Differential Line Receiver for Single-Supply Applications
      3. 8.2.3 Floating Single-Ended Input Line Receiver for Ground Loop Noise Reduction
      4. 8.2.4 Floating Single-Ended Input Line Receiver With Differential Outputs
      5. 8.2.5 TRS Audio Interface in Single-Supply Applications
      6. 8.2.6 Differential Line Driver With Single-Ended Input
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 TINA-TI（免费软件下载）
        2. 11.1.1.2 TI 高精度设计
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 相关链接
    4. 11.4 接收文档更新通知
    5. 11.5 社区资源
    6. 11.6 商标
    7. 11.7 静电放电警告
    8. 11.8 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10.1 Layout Guidelines

For best operational performance of the device, use good printed circuit board (PCB) layout practices, including:

  • Connect low-ESR, 1.0-µF and 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. Connecting bypass capacitors only from V+ to ground is acceptable in single-supply applications. Noise can propagate into analog circuitry through the power pins of this device. The bypass capacitors reduce the coupled noise by providing low-impedance pathways to ground.
  • Connect the device REF pins to a low-impedance, low-noise, system reference point (such as an analog ground or the VMID(OUT) pin) with the shortest trace possible.
  • Place the external components as close to the device as possible, as shown in Figure 63 and Figure 64.
  • Use ground pours and planes to shield input signal traces and minimize additional noise introduced into the signal path.
  • Keep the length of input traces equal and as short as possible. Route the input traces as a differential pair with as minimal spacing between them as possible.
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