ZHCSFN6F March   2007  – June 2021 INA203 , INA204 , INA205

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Current-Shunt Monitor
    6. 6.6 Electrical Characteristics: Comparator
    7. 6.7 Electrical Characteristics: Reference
    8. 6.8 Electrical Characteristics: General
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Basic Connections
      2. 7.3.2 Selecting RSHUNT
      3. 7.3.3 Comparator
      4. 7.3.4 Comparator Delay (14-Pin Version Only)
      5. 7.3.5 Comparator Maximum Input Voltage Range
    4. 7.4 Device Functional Modes
      1. 7.4.1 Input Filtering
      2. 7.4.2 Accuracy Variations as a Result Of VSENSE and Common-Mode Voltage
        1. 7.4.2.1 Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
        2. 7.4.2.2 Normal Case 2: VSENSE ≥ 20 mV, VCM < VS
        3. 7.4.2.3 Low VSENSE Case 1
        4. 7.4.2.4 Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
      3. 7.4.3 Transient Protection
      4. 7.4.4 Output Voltage Range
      5. 7.4.5 Reference
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|14
  • DGS|10
  • PW|14
散热焊盘机械数据 (封装 | 引脚)
订购信息

Pin Configuration and Functions

GUID-36F7FECE-EAF9-4B40-BD78-F1957917EEFB-low.gifFigure 5-1 D and PW Packages14-Pin SOIC and TSSOPTop View
GUID-F855C312-CE17-491E-B864-A448D4EBC934-low.gifFigure 5-2 DGS Package10-Pin VSSOPTop View
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NAME SOIC, TSSOP VSSOP
VS 1 1 I Power Supply
OUT 2 2 O Output voltage
CMP1 IN-/0.6-V Ref 3 I Comparator 1 negative input, can be used to override the internal 0.6-V reference
CMP1 IN+ 4 3 I Comparator 1 positive input
CMP2 IN+ 5 I Comparator 2 positive input
CMP2 IN– 4 I Comparator 2 negative input
CMP2 IN–/0.6-V Ref 6 I Comparator 2 negative input, can be used to override the internal 0.6-V reference
GND 7 5 I Ground
CMP1 RESET 8 6 I Comparator 1 output reset, active low
CMP2 DELAY 9 I Connect an optional capacitor to adjust comparator 2 delay
CMP2 OUT 10 7 O Comparator 2 output
CMP1 OUT 11 8 O Comparator 1 output
1.2-V REF OUT 12 O 1.2-V reference output
VIN– 13 9 I Connect to shunt low side
VIN+ 14 10 I Connect to shunt high side