ZHCSE07B July 2015 – September 2024 INA226-Q1
PRODUCTION DATA
To communicate with the INA226-Q1, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits and a direction bit that indicates whether the action is to be a read or write operation.
The device has two address pins, A0 and A1. Table 6-2 lists the pin logic levels for each of the 16 possible addresses. The device samples the state of pins A0 and A1 on every bus communication. Establish the pin states before any activity on the interface occurs.
A1 | A0 | SLAVE ADDRESS |
---|---|---|
GND | GND | 1000000 |
GND | VS | 1000001 |
GND | SDA | 1000010 |
GND | SCL | 1000011 |
VS | GND | 1000100 |
VS | VS | 1000101 |
VS | SDA | 1000110 |
VS | SCL | 1000111 |
SDA | GND | 1001000 |
SDA | VS | 1001001 |
SDA | SDA | 1001010 |
SDA | SCL | 1001011 |
SCL | GND | 1001100 |
SCL | VS | 1001101 |
SCL | SDA | 1001110 |
SCL | SCL | 1001111 |