ZHCSE07B July   2015  – September 2024 INA226-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Basic ADC Functions
        1. 6.3.1.1 Power Calculation
        2. 6.3.1.2 Alert Pin
    4. 6.4 Device Functional Modes
      1. 6.4.1 Averaging and Conversion Time Considerations
      2. 6.4.2 Filtering and Input Considerations
    5. 6.5 Programming
      1. 6.5.1 Programming the Calibration Register
      2. 6.5.2 Programming the Power Measurement Engine
        1. 6.5.2.1 Calibration Register and Scaling
      3. 6.5.3 Simple Current Shunt Monitor Usage (No Programming Necessary)
      4. 6.5.4 Default Settings
      5. 6.5.5 Bus Overview
        1. 6.5.5.1 Serial Bus Address
        2. 6.5.5.2 Serial Interface
        3. 6.5.5.3 Writing to and Reading From the INA226-Q1
          1. 6.5.5.3.1 High-Speed I2C Mode
        4. 6.5.5.4 SMBus Alert Response
  8. Registers
    1. 7.1 Register Maps
      1. 7.1.1  Configuration Register (00h) (Read/Write)
      2. 7.1.2  Shunt Voltage Register (01h) (Read-Only)
      3. 7.1.3  Bus Voltage Register (02h) (Read-Only) #GUID-792F23A7-1E45-4FB9-9334-0BF769622DE4/SBOS5477597
      4. 7.1.4  Power Register (03h) (Read-Only)
      5. 7.1.5  Current Register (04h) (Read-Only)
      6. 7.1.6  Calibration Register (05h) (Read/Write)
      7. 7.1.7  Mask/Enable Register (06h) (Read/Write)
      8. 7.1.8  Alert Limit Register (07h) (Read/Write)
      9. 7.1.9  Manufacturer ID Register (FEh) (Read-Only)
      10. 7.1.10 Die ID Register (FFh) (Read-Only)
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Sensing Circuit Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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Serial Interface

The INA226-Q1 operates only as a slave device on both the I2C bus and the SMBus. Connections to the bus are made using the open-drain SDA and SCL lines. The SDA and SCL pins feature integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. Although the device integrates spike suppression into the digital I/O lines, proper layout techniques help minimize the amount of coupling into the communication lines. This noise introduction can occur from capacitively coupling signal edges between the two communication lines themselves or from other switching noise sources present in the system. Routing traces in parallel with ground in between layers on a printed circuit board (PCB) typically reduces the effects of coupling between the communication lines. Shielded communication lines reduces the possibility of unintended noise coupling into the digital I/O lines that can be incorrectly interpreted as start or stop commands.

The INA226-Q1 supports the transmission protocol for fast mode (1 kHz to 400 kHz) and high-speed mode (1 kHz to 2.94 MHz). All data bytes are transmitted most significant byte first.