at TA = 25 °C, VVS = 3.3 V, VCM = 48 V, VSENSE = 0, and VVBUS = 48 V (unless otherwise noted)
Figure 6-2 Shunt Input Offset Voltage Production Distribution Figure 6-4 Shunt Input Offset Voltage vs. Temperature
Figure 6-6 Shunt Input Common-Mode Rejection Ratio vs. Temperature
Figure 6-8 Shunt Input Gain Error vs. Temperature Figure 6-10 Bus Input Offset Voltage Production Distribution Figure 6-12 Bus Input Gain Error Production Distribution
Figure 6-14 Input Bias Current vs. Differential Input Voltage
Figure 6-16 Input Bias Current vs. Temperature
Figure 6-18 Active IQ vs. Temperature
Figure 6-20 Shutdown IQ vs. Supply Voltage
Figure 6-22 Active IQ vs. Clock Frequency Figure 6-24 Internal Clock Frequency vs. Power Supply
Figure 6-3 Shunt Input Offset Voltage Production Distribution Figure 6-5 Common-Mode Rejection Ratio Production Distribution
Figure 6-7 Shunt Input Gain Error Production Distribution Figure 6-9 Shunt Input Gain Error vs. Common-Mode Voltage
Figure 6-11 Bus Input Offset Voltage vs. Temperature Figure 6-13 Bus Input Gain Error vs. Temperature
Figure 6-15 Input Bias Current (IB+ or IB–) vs. Common-Mode Voltage
Figure 6-17 Input Bias Current vs. Temperature, Shutdown
Figure 6-19 Active IQ vs. Supply Voltage
Figure 6-21 Shutdown IQ vs. Temperature
Figure 6-23 Shutdown IQ vs. Clock Frequency Figure 6-25 Internal Clock Frequency vs. Temperature