ZHCSFO8C July   2016  – September 2023 INA250-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Integrated Shunt Resistor
      2. 7.3.2 Short-Circuit Duration
      3. 7.3.3 Temperature Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Amplifier Operation
      2. 7.4.2 Input Filtering
        1. 7.4.2.1 Calculating Gain Error Resulting from External Filter Resistance
      3. 7.4.3 Shutting Down the Device
      4. 7.4.4 Using the Device with Common-Mode Transients Above 36 V
  9. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Current Summing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Parallel Multiple INA250-Q1 Devices for Higher Current
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Current Differencing
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics

at TA = 25°C, VS = 5 V, VIN+ = 12 V, VREF = 2.5 V, ISENSE = IN+ = 0 A, unless otherwise noted.

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Figure 6-1 INA250A1-Q1 Input Offset Distribution
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Figure 6-3 INA250A3-Q1 Input Offset Distribution
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Figure 6-5 Input Offset vs Temperature
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Figure 6-7 INA250A2-Q1 Common-Mode Rejection Ratio Distribution
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Figure 6-9 INA250A4-Q1 Common-Mode Rejection Ratio Distribution
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Figure 6-11 Power-Supply Rejection Ratio Distribution
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Figure 6-13 System Gain Error vs Temperature
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Figure 6-15 Amplifier Gain Error vs Temperature
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VCM = 12 V, VREF = 2.5 V, ISENSE = 0 A, VS = 5 V + 250-mV sine disturbance
Figure 6-17 Power-Supply Rejection vs Frequency
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Figure 6-19 Output Voltage Swing vs Output Current
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ISENSE = 0 A, VS = 0 V, VREF = 0 V
Figure 6-21 Input Bias Current vs Common-Mode Voltage (VS = 0 V)
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VREF = VS / 2
Figure 6-23 Quiescent Current vs Temperature
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VS = 5 V, VREF = 2.5 V, ISENSE = 0 A
Figure 6-25 Input-Referred Voltage Noise vs Frequency
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Input = (VIN+) - (VIN-)
Figure 6-27 Step Response
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Figure 6-29 Start-Up Response
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Figure 6-2 INA250A2-Q1 Input Offset Distribution
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Figure 6-4 INA250A4-Q1 Input Offset Distribution
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Figure 6-6 INA250A1-Q1 Common-Mode Rejection Ratio Distribution
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Figure 6-8 INA250A3-Q1 Common-Mode Rejection Ratio Distribution
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Figure 6-10 Common-Mode Rejection Ratio vs Temperature
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Figure 6-12 Power-Supply Rejection Ratio vs Temperature
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System gain error = RSHUNT error + amplifier gain error, load current = 10 A
Figure 6-14 System Gain Error Distribution
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VCM = 12 V, ISENSE = 500 mAPP
Figure 6-16 Amplifier Gain vs Frequency
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VS = 5 V, VREF = 2.5 V, ISENSE = 0 A, VCM = 1-V sine wave
Figure 6-18 Common-Mode Rejection vs Frequency
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ISENSE = 0 A, VS = 5 V
Figure 6-20 Input Bias Current vs Common-Mode Voltage (VS = 5 V)
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ISENSE = 0 A, VS = 5 V
Figure 6-22 Input Bias Current vs Temperature
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VREF = 2.5 V
Figure 6-24 Quiescent Current vs Supply Voltage
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VS = 5 V, VCM = 0 V, ISENSE = 0 A
Figure 6-26 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
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Input = VIN+, VREF = 2.5 V
Figure 6-28 Common-Mode Transient Response