SBOSAD4 June   2024 INA4230

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements (I2C)
    7. 5.7 Timing Diagram
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Integrated Analog-to-Digital Converter (ADC)
      2. 6.3.2 Internal Measurement and Calculation Engine
      3. 6.3.3 Low Bias Current
      4. 6.3.4 Low Voltage Supply and Wide Common-Mode Voltage Range
      5. 6.3.5 ALERT Pin
    4. 6.4 Device Functional Modes
      1. 6.4.1 Continuous Versus Triggered Operation
      2. 6.4.2 Device Low Power Modes
      3. 6.4.3 Power-On Reset
      4. 6.4.4 Averaging and Conversion Time Considerations
    5. 6.5 Programming
      1. 6.5.1 I2C Serial Interface
      2. 6.5.2 Writing to and Reading Through the I2C Serial Interface
      3. 6.5.3 High-Speed I2C Mode
      4. 6.5.4 General Call Reset
      5. 6.5.5 SMBus Alert Response
  8. Register Maps
    1. 7.1 Device Registers
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Device Measurement Range and Resolution
      2. 8.1.2 Current and Power Calculations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select the Shunt Resistor
        2. 8.2.2.2 Configure the Device
        3. 8.2.2.3 Program the Shunt Calibration Registers
        4. 8.2.2.4 Set Desired Fault Thresholds
        5. 8.2.2.5 Calculate Returned Values
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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Application Curves

Figure 8-2 and Figure 8-3 show the ALERT pin response to a BUS over voltage fault with a conversion time of 140μs for the bus voltage measurements with averaging set to 1. For these scope shots, persistence was enabled on the ALERT channel to show the variation in the alert response for many sequential fault events. The alert response time can change depending on the value of the current before fault occurs as well as the how much the fault condition exceeds the programmed fault threshold. Figure 8-2 shows the response time for an overcurrent fault when the fault condition greatly exceeds the programmed threshold. While Figure 8-3 shows the over voltage response time when the fault slightly exceeds the programmed threshold. Variation in the alert response exists because the external fault event is not synchronized to the internal ADC conversion start. Also the ADC is constantly sampling to get a result, so the response time for fault events starting from zero are slower than fault events starting from values near the set fault threshold. In applications where the alert timing is critical, the worst-case alert response is equal to 2 × (tconv_shunt + tconv_voltage) × number of channels enabled. When alerting on over power conditions, an additional 60μs needed to allow for background math calculations.

INA4230  Alert Response Time (Sampled Values Significantly Above Threshold)Figure 8-2 Alert Response Time (Sampled Values Significantly Above Threshold)
INA4230 Alert Response Time (Sampled Values Slightly Above Threshold)Figure 8-3 Alert Response Time (Sampled Values Slightly Above Threshold)