For best operational performance of the device,
use good PCB layout practices, including:
- Take care to make sure that both input
paths are well-matched for source impedance and capacitance to avoid converting
common-mode signals into differential signals.
- Noise propagates into analog circuitry
through the power pins of the circuit as a whole and of the device. Bypass capacitors
reduce the coupled noise by providing low-impedance power sources local to the analog
circuitry.
- Connect low-ESR, 0.1-µF ceramic
bypass capacitors between each supply pin and ground, placed as close to the device
as possible. A single bypass capacitor from +VS to ground is applicable for
single-supply applications.
- To reduce parasitic coupling, run the
input traces as far away from the supply or output traces as possible. If these traces
cannot be kept separate, crossing the sensitive trace perpendicular is much better than
in parallel with the noisy trace.
- Place the external components (filter
components, load) as close to the device as possible.
- Use ground layer to minimize the
parasitic inductance of the board.
- Keep the traces as short as
possible.