ZHCSID5H April 2018 – June 2024 ISO1410 , ISO1412 , ISO1430 , ISO1432 , ISO1450 , ISO1452
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
| 参数 | 测试条件 | 最小值 | 典型值 | 最大值 | 单位 |
|---|---|---|---|---|---|
| 驱动器被启用，接收器被禁用 | |||||
| 逻辑侧电源电流 | VD = VCC1，VCC1 = 5V ± 10% | 2.6 | 4.4 | mA | |
| 逻辑侧电源电流 | VD = VCC1，VCC1 = 3.3V ± 10% | 2.6 | 4.4 | mA | |
| 逻辑侧电源电流 | ISO141x，D = 500kbps 方波，占空比为 50%，VCC1 = 5V ± 10% | 3.2 | 5.1 | mA | |
| 逻辑侧电源电流 | ISO141x，D = 500kbps 方波，占空比为 50%，VCC1 = 3.3V ± 10% | 3.2 | 5.1 | mA | |
| 逻辑侧电源电流 | ISO143x，D = 12Mbps 方波，占空比为 50%，VCC1 = 5V ± 10% | 3.2 | 5.1 | mA | |
| 逻辑侧电源电流 | ISO143x，D = 12Mbps 方波，占空比为 50%，VCC1 = 3.3V ± 10% | 3.2 | 5.1 | mA | |
| 逻辑侧电源电流 | ISO145x，D = 50Mbps 方波，占空比为 50%，VCC1 = 5V ± 10% | 3.6 | 5.3 | mA | |
| 逻辑侧电源电流 | ISO145x，D = 50Mbps 方波，占空比为 50%，VCC1 = 3.3V ± 10% | 3.4 | 5.2 | mA | |
| 驱动器被启用，接收器被启用 | |||||
| 逻辑侧电源电流 | VRE = VGND1，针对全双工器件环回，VD = VCC1，VCC1 = 5V ± 10% | 2.6 | 4.4 | mA | |
| 逻辑侧电源电流 | VRE = VGND1，针对全双工器件环回，VD = VCC1，VCC1 = 3.3V ± 10% | 2.6 | 4.4 | mA | |
| 逻辑侧电源电流 | ISO141x，VRE = VGND1，针对全双工器件环回，D = 500kbps 方波，50% 占空比，VCC1 = 5V ± 10%，CL(R)(1) = 15pF | 3.3 | 5.1 | mA | |
| 逻辑侧电源电流 | ISO141x，VRE = VGND1，针对全双工器件环回，D = 500kbps 方波，50% 占空比，VCC1 = 3.3V ± 10%，CL(R)(1) = 15pF | 3.2 | 5.1 | mA | |
| 逻辑侧电源电流 | ISO143x，VRE = VGND1，针对全双工器件环回，D = 12Mbps 方波，50% 占空比、VCC1 = 5V ± 10%，CL(R)(1) = 15pF | 4.1 | 6 | mA | |
| 逻辑侧电源电流 | ISO143x，VRE = VGND1，针对全双工器件环回，D = 12Mbps 方波，50% 占空比，VCC1 = 3.3V ± 10%，CL(R)(1) = 15pF | 3.8 | 5.7 | mA | |
| 逻辑侧电源电流 | ISO145x，VRE = VGND1，针对全双工器件环回，D = 50Mbps 方波，50% 占空比、VCC1 = 5V ± 10%，CL(R)(1) = 15pF | 6.3 | 8.9 | mA | |
| 逻辑侧电源电流 | ISO145x，VRE = VGND1，针对全双工器件环回，D = 50Mbps 方波，50% 占空比，VCC1 = 3.3V ± 10%，CL(R)(1) = 15pF | 5.3 | 7.8 | mA | |
| 驱动器被禁用，接收器被启用 | |||||
| 逻辑侧电源电流 | V(A-B) ≥ 200mV，VD = VCC1，VCC1 = 5V ± 10% | 1.6 | 3.1 | mA | |
| 逻辑侧电源电流 | V(A-B) ≥ 200mV，VD = VCC1，VCC1 = 3.3V ± 10% | 1.6 | 3.1 | mA | |
| 逻辑侧电源电流 | ISO141x，(A-B) = 500kbps 方波，占空比为 50%，VD = VCC1、VCC1 = 5V ± 10%，CL(R)(1) = 15pF | 1.7 | 3.1 | mA | |
| 逻辑侧电源电流 | ISO141x，(A-B) = 500kbps 方波，占空比为 50%，VD = VCC1、VCC1 = 3.3V ± 10%，CL(R)(1) = 15pF | 1.6 | 3.1 | mA | |
| 逻辑侧电源电流 | ISO143x，(A-B) = 12Mbps 方波，占空比为 50%，VD = VCC1、VCC1 = 5V ± 10%，CL(R)(1) = 15pF | 2.6 | 4 | mA | |
| 逻辑侧电源电流 | ISO143x，(A-B) = 12Mbps 方波，占空比为 50%，VD = VCC1、VCC1 = 3.3V ± 10%，CL(R)(1) = 15pF | 2.2 | 3.7 | mA | |
| 逻辑侧电源电流 | ISO145x，(A-B) = 50Mbps 方波，占空比为 50%，VD = VCC1、VCC1 = 5V ± 10%，CL(R)(1) = 15pF | 4.7 | 6.7 | mA | |
| 逻辑侧电源电流 | ISO145x，(A-B) = 50Mbps 方波，占空比为 50%，VD = VCC1、VCC1 = 3.3V ± 10%，CL(R)(1) = 15pF | 3.7 | 5.7 | mA | |
| 驱动器被禁用，接收器被禁用 | |||||
| 逻辑侧电源电流 | VDE = VGND1，VD = VCC1，VCC1 = 5V ± 10% | 1.6 | 3.1 | mA | |
| 逻辑侧电源电流 | VDE = VGND1，VD = VCC1，VCC1 = 3.3V ± 10% | 1.6 | 3.1 | mA | |