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ZHCSFS4D November 2016 – December 2022 ISO1540-Q1 , ISO1541-Q1

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6.9 Electrical Characteristics

over recommended operating conditions, unless otherwise noted

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SIDE 1 (ONLY)
V_ILT1	Voltage input threshold low, SDA1 and SCL1		480	550	660	mV
V_IHT1	Voltage input threshold high, SDA1 and SCL1		520	610	700	mV
V_HYST1	Voltage input hysteresis	V_IHT1 –V_ILT1	40	60		mV
V_OL1	Low-level output voltage, SDA1 and SCL1⁽¹⁾	0.5 mA ≤ (I_SDA1 and I_SCL1) ≤ 3.5 mA	570		800	mV
ΔV_OIT1	Low-level output voltage to high-level input voltage threshold difference, SDA1 and SCL1⁽¹⁾⁽²⁾	0.5 mA ≤ (I_SDA1 and I_SCL1) ≤ 3.5 mA	50			mV
SIDE 2 (ONLY)
V_ILT2	Voltage input threshold low, SDA2 and SCL2		0.3 × VCC2		0.4 × VCC2	V
V_IHT2	Voltage input threshold high, SDA2 and SCL2		0.4 × VCC2		0.5 × VCC2	V
V_HYST2	Voltage input hysteresis	V_IHT2 – V_ILT2	0.05 × VCC2			V
V_OL2	Low-level output voltage, SDA2 and SCL2	0.5 mA ≤ (I_SDA2 and I_SCL2) ≤ 35 mA			0.4	V
BOTH SIDES
\|I_I\|	Input leakage currents, SDA1, SCL1, SDA2, and SCL2	V_SDA1, V_SCL1 = VCC1; V_SDA2, V_SCL2 = VCC2		0.01	10	µA
C_I	Input capacitance to local ground, SDA1, SCL1, SDA2, and SCL2	V_I = 0.4 × sin(2E6πt) + 2.5 V		7		pF
CMTI	Common-mode transient immunity	See Figure 7-3	25	50		kV/µs
V_CCUV	VCC undervoltage lockout threshold⁽³⁾		1.7	2.5	2.9	V

(1) This parameter does not apply to the ISO1541-Q1 SCL1 line as it is unidirectional.

(2) ∆V_OIT1 = V_OL1 – V_IHT1. This represents the minimum difference between a Low-Level Output Voltage and a High-Level Input Voltage Threshold to prevent a permanent latch condition that would otherwise exist with bidirectional communication.

(3) Any VCC voltages, on either side, less than the minimum will ensure device lockout. Both VCC voltages greater than the maximum will prevent device lockout.