To isolate a bidirectional signal path (SDA or SCL), the ISO1640-Q1 internally splits a bidirectional line into two unidirectional signal lines, each of which is isolated through a single-channel digital isolator. Each channel output is made open-drain to comply with the open-drain technology of I²C. Side 1 of the ISO1640-Q1 connects to a low-capacitance I²C node (up to 80 pF), while side 2 is designed for connecting to a fully loaded I²C bus with up to 400 pF of capacitance.

Figure 8-2 SDA Channel Design and Voltage Levels at SDA1

At first sight, the arrangement of the internal buffers suggests a closed signal loop that is prone to latch-up. However, this loop is broken by implementing an output buffer (B) whose output low-level is raised by a diode drop to approximately 0.65 V, and the input buffer (C) that consists of a comparator with defined hysteresis. The comparator’s upper and lower input thresholds then distinguish between the proper low-potential of 0.4 V (maximum) driven directly by SDA1 and the buffered output low-level of B.

Figure 8-3 demonstrate the switching behavior of the I²C isolator, ISO164x-Q1, between a master node at SDA1 and a heavy loaded bus at SDA2.

Figure 8-3 SDA Channel Timing in Receive and Transmit Directions