ZHCSMP3A December 2019 – June 2021 ISO6731-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
tPLH, tPHL | Propagation delay time | @100kbps See GUID-CE26D3C0-630D-48BF-A201-8782BECDDCA9.html#SLLSEP42278 |
11 | 18 | ns | ||
PWD | Pulse width distortion#SLLSEP4629_SF2 |tPHL – tPLH| | 0.5 | 7 | ns | |||
tsk(o) | Channel-to-channel output skew time#SLLSEI65247_SF2 | Same-direction channels | 6 | ns | |||
tsk(pp) | Part-to-part skew time#SLLSEP45141_SF2 | 7 | ns | ||||
tr | Output signal rise time | See GUID-CE26D3C0-630D-48BF-A201-8782BECDDCA9.html#SLLSEP42278 | 1.6 | 3.2 | ns | ||
tf | Output signal fall time | 1.6 | 3.2 | ns | |||
tPHZ | Disable propagation delay, high-to-high impedance output | See GUID-CE26D3C0-630D-48BF-A201-8782BECDDCA9.html#SLLSEP49843 | 23.2 | 34.4 | ns | ||
tPLZ | Disable propagation delay, low-to-high impedance output | 23.2 | 34.4 | ns | |||
tPZH | Enable propagation delay, high impedance-to-high output for ISO673x | 16.6 | 23 | ns | |||
tPZL | Enable propagation delay, high impedance-to-low output for ISO673x | 16.6 | 23 | ns | |||
tPU | Time from UVLO to valid output data | 300 | us | ||||
tDO | Default output delay time from input power loss | Measured from the time VCC goes below 1.2V. See GUID-CE26D3C0-630D-48BF-A201-8782BECDDCA9.html#SLLSES06055 | 0.1 | 0.3 | us | ||
tie | Time interval error | 216 – 1 PRBS data at 50 Mbps | 1 | ns |