米6体育平台手机版

PRODUCTION DATA.

V_CC1 at 5 V ± 10%, V_CC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted.)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_CC1	V_CC1 supply current	ISO7220x quiescent, V_I = V_CC or 0 V, no load		1	2	mA
		ISO7221x quiescent, V_I = V_CC or 0 V, no load		8.5	17	mA
		ISO7220A and ISO7220B 1 Mbps, 0.5-MHz input clock signal, no load		2	3	mA
		ISO7221A and ISO7221B 1 Mbps, 0.5-MHz input clock signal, no load		10	18	mA
		ISO7220C and ISO7220M 25 Mbps, 12.5-MHz input clock signal, no load		4	9	mA
		ISO7221C and ISO7221M 25 Mbps, 12.5-MHz input clock signal, no load		12	22	mA
I_CC2	V_CC2 supply current	ISO7220x quiescent, V_I = V_CC or 0 V, no load		8	18	mA
		ISO7221x quiescent, V_I = V_CC or 0 V, no load		4.3	9.5	mA
		ISO7220A and ISO7220B 1 Mbps, 0.5-MHz input clock signal, no load		9	19	mA
		ISO7221A and ISO7221B 1 Mbps, 0.5-MHz input clock signal, no load		5	11	mA
		ISO7220C and ISO7220M 25 Mbps, 12.5-MHz input clock signal, no load		10	20	mA
		ISO7221C and ISO7221M 25 Mbps, 12.5-MHz input clock signal, no load		6	12	mA
V_OH	High-level output voltage	ISO7220x, ISO7221x (3.3-V side), I_OH = –4 mA, See Figure 14	V_CC – 0.4			V
		ISO7221x (5-V side), I_OH = –4 mA, See Figure 14	V_CC – 0.8
		All devices, I_OH = –20 μA, See Figure 14	V_CC – 0.1
V_OL	Low-level output voltage	I_OL = 4 mA, See Figure 14			0.4	V
V_OL	Low-level output voltage	I_OL = 20 μA, See Figure 14			0.1	V
V_I(HYS)	Input voltage hysteresis			150		mV
I_IH	High-level input current	IN from 0 V to V_CC			10	μA
I_IL	Low-level input current	IN from 0 V to V_CC	–10			μA
C_I	Input capacitance to ground	IN at V_CC, V_I = 0.4 sin (4E6πt)		1		pF
CMTI	Common-mode transient immunity	V_I = V_CC or 0 V, See Figure 16	15	40		kV/μs