米6体育平台手机版

PRODUCTION DATA.

V_CC1 and V_CC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted.)⁽¹⁾

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_CC1	V_CC2 supply current	ISO7220x quiescent, V_I = V_CC or 0 V, no load		0.6	1	mA
		ISO7221x quiescent, V_I = V_CC or 0 V, no load		4.3	9.5	mA
		ISO7220A and ISO7220B 1 Mbps, 0.5-MHz input clock signal, no load		1	2	mA
		ISO7221A and ISO7221B 1 Mbps, 0.5-MHz input clock signal, no load		5	11	mA
		ISO7220C and ISO7220M 25 Mbps, 12.5-MHz input clock signal, no load		2	4	mA
		ISO7221C and ISO7221M 25 Mbps, 12.5-MHz input clock signal, no load		6	12	mA
I_CC2	V_CC2 supply current	ISO7220x quiescent, V_I = V_CC or 0 V, no load		8	18	mA
		ISO7221x quiescent, V_I = V_CC or 0 V, no load		4.3	9.5	mA
		ISO7220A and ISO7220B 1 Mbps, 0.5-MHz input clock signal, no load		9	19	mA
		ISO7221A and ISO7221B 1 Mbps, 0.5-MHz input clock signal, no load		5	11	mA
		ISO7220C and ISO7220M 25 Mbps, 12.5-MHz input clock signal, no load		10	20	mA
		ISO7221C and ISO7221M 25 Mbps, 12.5-MHz input clock signal, no load		6	12	mA
V_OH	High-level output voltage	I_OH = –4 mA, See Figure 14	V_CC – 0.4	3		V
V_OH	High-level output voltage	I_OH = –20 μA, See Figure 14	V_CC – 0.1	3.3
V_OL	Low-level output voltage	I_OL = 4 mA, See Figure 14		0.2	0.4
V_OL	Low-level output voltage	I_OL = 20 μA, See Figure 14		0	0.1
V_I(HYS)	Input voltage hysteresis			150		mV
I_IH	High-level input current	IN from 0 V or V_CC			10	μA
I_IL	Low-level input current	IN from 0 V or V_CC	–10			μA
C_I	Input capacitance to ground	IN at V_CC, V_I = 0.4 sin (4E6πt)		1		pF
CMTI	Common-mode transient immunity	V_I = V_CC or 0 V, See Figure 16	15	40		kV/μs

(1) For the 3.3-V operation, V_CC1 or V_CC2 is specified from 3 V to 3.6 V.