ZHCSIQ8R July 2006 – October 2024 ISO7220A , ISO7220B , ISO7220C , ISO7220M , ISO7221A , ISO7221B , ISO7221C , ISO7221M
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| ICC1 | VCC1 supply current | ISO7220x quiescent, VI = VCC or 0 V, no load | 1 | 2 | mA | |
| ISO7221x quiescent, VI = VCC or 0 V, no load | 8.5 | 17 | ||||
| ISO7220A and ISO7220B 1 Mbps, 0.5-MHz input clock signal, no load | 2 | 3 | mA | |||
| ISO7221A and ISO7221B 1 Mbps, 0.5-MHz input clock signal, no load | 10 | 18 | ||||
| ISO7220C and ISO7220M 25 Mbps, 12.5-MHz input clock signal, no load | 4 | 9 | mA | |||
| ISO7221C and ISO7221M 25 Mbps, 12.5-MHz input clock signal, no load | 12 | 22 | ||||
| ICC2 | VCC2 supply current | ISO7220x quiescent, VI = VCC or 0 V, no load | 8 | 18 | mA | |
| ISO7221x quiescent, VI = VCC or 0 V, no load | 4.3 | 9.5 | ||||
| ISO7220A and ISO7220B 1 Mbps, 0.5-MHz input clock signal, no load | 9 | 19 | mA | |||
| ISO7221A and ISO7221B 1 Mbps, 0.5-MHz input clock signal, no load | 5 | 11 | ||||
| ISO7220C and ISO7220M 25 Mbps, 12.5-MHz input clock signal, no load | 10 | 20 | mA | |||
| ISO7221C and ISO7221M 25 Mbps, 12.5-MHz input clock signal, no load | 6 | 12 | ||||
| VOH | High-level output voltage | ISO7220x, ISO7221x (3.3-V side), IOH = –4 mA, See Figure 6-1 | VCC – 0.4 | V | ||
| ISO7221x (5-V side), IOH = –4 mA, See Figure 6-1 | VCC – 0.8 | |||||
| All devices, IOH = –20 μA, See Figure 6-1 | VCC – 0.1 | |||||
| VOL | Low-level output voltage | IOL = 4 mA, See Figure 6-1 | 0.4 | V | ||
| IOL = 20 μA, See Figure 6-1 | 0.1 | |||||
| VI(HYS) | Input voltage hysteresis | 150 | mV | |||
| IIH | High-level input current | IN from 0 V to VCC | 10 | μA | ||
| IIL | Low-level input current | IN from 0 V to VCC | –10 | μA | ||
| CI | Input capacitance to ground | IN at VCC, VI = 0.4 sin (2πft), f = 2MHz. | 1 | pF | ||
| CMTI | Common-mode transient immunity | VI = VCC or 0 V, See Figure 6-3 | 15 | 40 | kV/μs | |