7 Parameter Measurement Information

ISO7230C ISO7231C ISO7231M Switching
Characteristic Test Circuit and Voltage Waveforms

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω. At the input, a 50-Ω resistor is required to terminate the Input Generator signal. The 50-Ω is not needed in actual application.

B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 7-1 Switching Characteristic Test Circuit and Voltage Waveforms

ISO7230C ISO7231C ISO7231M Enable/Disable Propagation Delay Time Test Circuit and Waveform

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t_r ≤ 3 ns, t_f ≤ 3 ns, Z_O = 50Ω.

B. C_L = 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 7-2 Enable/Disable Propagation Delay Time Test Circuit and Waveform

ISO7230C ISO7231C ISO7231M Failsafe
Delay Time Test Circuit and Voltage Waveforms

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t_r ≤ 3 ns, t_f ≤ 3 ns, Z_O = 50 Ω.

B. C_L = 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 7-3 Failsafe Delay Time Test Circuit and Voltage Waveforms

ISO7230C ISO7231C ISO7231M Common-Mode Transient Immunity Test Circuit

A. C_L = 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 7-4 Common-Mode Transient Immunity Test Circuit

ISO7230C ISO7231C ISO7231M Peak-to-Peak Eye-Pattern Jitter Test Circuit and Voltage Waveform

PRBS bit pattern run length is 2¹⁶ – 1. Transition time is 800 ps. NRZ data input has no more than five consecutive 1s or 0s.

Figure 7-5 Peak-to-Peak Eye-Pattern Jitter Test Circuit and Voltage Waveform