SLLSE40B September 2010 – November 2024 ISO7240CF-Q1 , ISO7241C-Q1 , ISO7242C-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configurations and Functions
-
5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 Recommended Operating Conditions
- 5.4 Thermal Characteristics
- 5.5 Power Ratings
- 5.6 Safety-Related Certifications
- 5.7 Safety Limiting Values
- 5.8 Insulation Specifications
- 5.9 Electrical Characteristics: VCC1 and VCC2 at 5-V Operation
- 5.10 Electrical Characteristics: VCC1 and VCC2 at 3.3 V Operation
- 5.11 Electrical Characteristics: VCC1 at 3.3-V, VCC2 at 5-V Operation
- 5.12 Electrical Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
- 5.13 Switching Characteristics: VCC1 and VCC2 at 3.3-V Operation
- 5.14 Switching Characterstics: VCC1 and VCC2 at 5-V Operation
- 5.15 Switching Characteristics: VCC1 at 3.3-V and VCC2 at 5-V Operation
- 5.16 Switching Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
- 5.17 Insulation Characteristics Curves
- 5.18 Typical Characteristic
- 6 Parameter Measurement Information
- 7 Detailed Description
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
6 Parameter Measurement Information
A. The input pulse is supplied by a
generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle,
tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.
B. CL = 15 pF and includes
instrumentation and fixture capacitance within ±20%.
Figure 6-1 Switching
Characteristic Test Circuit and Voltage Waveforms
A. The input pulse is supplied by a
generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle,
tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50Ω.
B. CL = 15 pF and includes
instrumentation and fixture capacitance within ±20%.
Figure 6-2 Enable or
Disable Propagation-Delay Time Test Circuit and Waveform
A. CL = 15 pF and includes
instrumentation and fixture capacitance within ±20%.
Figure 6-3 Failsafe Delay
Time Test Circuit and Voltage Waveforms
The test that yields the
longest time is used in this data sheet.
A. The input pulse is supplied by a
generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle,
tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50Ω.
B. CL = 15 pF and includes
instrumentation and fixture capacitance within ±20%.
Figure 6-4 Wake Time From
Input Disable Test Circuit and Voltage Waveforms
A. CL = 15 pF and includes
instrumentation and fixture capacitance within ±20%.
B. The input pulse is supplied by a
generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle,
tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.
Figure 6-5 Common-Mode
Transient Immunity Test Circuit and Voltage Waveform
PRBS bit pattern
run length is 216 – 1. Transition time is 800 ps. NRZ data input has no more
than five consecutive 1s or 0s.
Figure 6-6 Peak-to-Peak
Eye-Pattern Jitter Test Circuit and Voltage Waveform