ZHCSXC9B
September 2010 – November 2024
ISO7240CF-Q1
,
ISO7241C-Q1
,
ISO7242C-Q1
PRODUCTION DATA
1
1
特性
2
应用
3
说明
4
Pin Configurations and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Characteristics
5.5
Power Ratings
5.6
Safety-Related Certifications
5.7
Safety Limiting Values
5.8
Insulation Specifications
5.9
Electrical Characteristics: VCC1 and VCC2 at 5-V Operation
5.10
Electrical Characteristics: VCC1 and VCC2 at 3.3 V Operation
5.11
Electrical Characteristics: VCC1 at 3.3-V, VCC2 at 5-V Operation
5.12
Electrical Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
5.13
Switching Characteristics: VCC1 and VCC2 at 3.3-V Operation
5.14
Switching Characterstics: VCC1 and VCC2 at 5-V Operation
5.15
Switching Characteristics: VCC1 at 3.3-V and VCC2 at 5-V Operation
5.16
Switching Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
5.17
Insulation Characteristics Curves
5.18
Typical Characteristic
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
7.4.1
Device I/O Schematics
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Isolated Data Acquisition System for Process Control
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.2
Isolated SPI for an Analog Input Module with 16 Inputs
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.3
Isolated RS-232 Interface
8.2.3.1
Design Requirements
8.2.3.2
Detailed Design Procedure
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.1.1
PCB Material
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Related Links
9.3
接收文档更新通知
9.4
支持资源
9.5
Trademarks
9.6
静电放电警告
9.7
术语表
10
Revision History
11
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
DW|16
MSOI003I
散热焊盘机械数据 (封装 | 引脚)
DW|16
QFND505A
订购信息
zhcsxc9b_oa
zhcsxc9b_pm
6
Parameter Measurement Information
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t
r
≤ 3 ns, t
f
≤ 3 ns, Z
O
= 50 Ω.
B.
C
L
= 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 6-1
Switching Characteristic Test Circuit and Voltage Waveforms
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t
r
≤ 3 ns, t
f
≤ 3 ns, Z
O
= 50Ω.
B.
C
L
= 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 6-2
Enable or Disable Propagation-Delay Time Test Circuit and Waveform
A.
C
L
= 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 6-3
Failsafe Delay Time Test Circuit and Voltage Waveforms
The test that yields the longest time is used in this data sheet.
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t
r
≤ 3 ns, t
f
≤ 3 ns, Z
O
= 50Ω.
B.
C
L
= 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 6-4
Wake Time From Input Disable Test Circuit and Voltage Waveforms
A.
C
L
= 15 pF and includes instrumentation and fixture capacitance within ±20%.
B.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t
r
≤ 3 ns, t
f
≤ 3 ns, Z
O
= 50 Ω.
Figure 6-5
Common-Mode Transient Immunity Test Circuit and Voltage Waveform
PRBS bit pattern run length is 2
16
– 1. Transition time is 800 ps. NRZ data input has no more than five consecutive 1s or 0s.
Figure 6-6
Peak-to-Peak Eye-Pattern Jitter Test Circuit and Voltage Waveform
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