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ZHCSDJ9B January 2015 – April 2015 ISO7330C , ISO7330FC , ISO7331C , ISO7331FC

PRODUCTION DATA.

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

DW|16

散热焊盘机械数据 (封装 | 引脚)

订购信息

7 Parameter Measurement Information

ISO7330C ISO7330FC ISO7331C ISO7331FC switch_test_circuit_sllsek9.gif

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t_r ≤ 3 ns, t_f ≤ 3 ns, Z_O = 50 Ω. At the input, a 50-Ω resistor is required to terminate the Input Generator signal. It is not needed in actual application.

B. C_L = 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 11. Switching Characteristic Test Circuit and Voltage Waveforms

ISO7330C ISO7330FC ISO7331C ISO7331FC delay_tim_llsek9.gif

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 10 kHz, 50% duty cycle,
t_r ≤ 3 ns, t_f ≤ 3 ns, Z_O = 50 Ω.

B. C_L = 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 12. Enable/Disable Propagation Delay Time Test Circuit and Waveform

ISO7330C ISO7330FC ISO7331C ISO7331FC failsafe_sllsek9.gif

A. C_L = 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 13. Fail-Safe Output Delay-Time Test Circuit and Voltage Waveforms

ISO7330C ISO7330FC ISO7331C ISO7331FC com_tran_imm_test_circ_sllsek9.gif

A. C_L = 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 14. Common-Mode Transient Immunity Test Circuit