SLLS984I June 2009 – July 2015 ISO7420 , ISO7420M , ISO7421
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics: VCC1 and VCC2 at 5 V ±5%
- 6.6 Electrical Characteristics: VCC1 at 5 V ±5%, VCC2 at 3.3 V ±5%
- 6.7 Electrical Characteristics: VCC1 at 3.3 V ±5%, VCC2 at 5 V ±5%
- 6.8 Electrical Characteristics: VCC1 and VCC2 at 3.3 V ±5%
- 6.9 Power Dissipation Characteristics
- 6.10 Switching Characteristics: VCC1 and VCC2 at 5 V ±5%
- 6.11 Switching Characteristics: VCC1 at 5 V ±5%, VCC2 at 3.3 V ±5%
- 6.12 Switching Characteristics: VCC1 at 3.3 V ±5%, VCC2 at 5 V ±5%
- 6.13 Switching Characteristics: VCC1 and VCC2 at 3.3 V ±5%
- 6.14 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
7 Parameter Measurement Information
1. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω. At the input, a 50-Ω resistor is required to terminate the Input Generator signal. It is not needed in actual application.
2. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 6. Switching Characteristic Test Circuit and Voltage Waveforms
1. CL = 15 pF ± 20% includes instrumentation and fixture capacitance.
Figure 7. Fail-Safe Output Delay-Time Test Circuit and Voltage Waveforms
1. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 8. Common-Mode Transient Immunity Test Circuit