ZHCS455F December   2010  – July 2015 ISO7420E , ISO7420FE , ISO7421E , ISO7421FE

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: VCC1 and VCC2 = 5 V ± 10%
    6. 6.6  Electrical Characteristics: VCC1 = 5 V ± 10%, VCC2 = 3.3 V ± 10%
    7. 6.7  Electrical Characteristics: VCC1 = 3.3 V ± 10%, VCC2 = 5 V ± 10%
    8. 6.8  Electrical Characteristics: VCC1 and VCC2 = 3.3 V ± 10%
    9. 6.9  Power Dissipation Characteristics
    10. 6.10 Switching Characteristics: VCC1 and VCC2 = 5 V ± 10%
    11. 6.11 Switching Characteristics: VCC1 = 5 V ± 10%, VCC2 = 3.3 V ± 10%
    12. 6.12 Switching Characteristics: VCC1 = 3.3 V ± 10%, VCC2 = 5 V ± 10%
    13. 6.13 Switching Characteristics: VCC1 and VCC2 = 3.3 V ± 10%
    14. 6.14 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Insulation and Safety-Related Specifications for D-8 Package
      2. 8.3.2 Insulation Characteristics
      3. 8.3.3 Regulatory Information
      4. 8.3.4 Life Expectancy vs Working Voltage
      5. 8.3.5 Safety Limiting Values
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematic
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Maximum Supply Current Equations
          1. 9.2.2.1.1 ISO7420
          2. 9.2.2.1.2 ISO7421
        2. 9.2.2.2 Typical Supply Current Equations:
          1. 9.2.2.2.1 ISO7420
          2. 9.2.2.2.2 ISO7421
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档　
    2. 12.2 相关链接
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings(1)

MIN MAX UNIT
VCC Supply voltage(2), VCC1, VCC2 –0.5 6 V
VI Voltage at IN, OUT –0.5 VCC + 0.5(3) V
IO Output current ±15 mA
VSRG Maximum surge immunity - Supports IEC 61000-4-5 4000 VPK
TJ(Max) Maximum junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal and are peak voltage values.
(3) Maximum voltage must not exceed 6 V.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±3000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
Machine model (MM) ANSI/ESDS5.2-1996 ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VCC1, VCC2 Supply voltage 3.0 5.5 V
IOH High-level output current –4 mA
IOL Low-level output current 4 mA
VIH High-level input voltage 2 5.5 V
VIL Low-level input voltage 0 0.8 V
tui Input pulse duration 20 ns
1 / tui Signaling rate 0 50(2) Mbps
TJ(1) Junction temperature –40 136 °C
TA Ambient Temperature -40 25 125 °C
(1) To maintain the recommended operating conditions for TJ, see the Thermal Information table.
(2) Under typical conditions, these devices are capable of signaling rate > 150 Mbps.

6.4 Thermal Information

THERMAL METRIC(1) ISO742x UNIT
D (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance Low-K board 212 °C/W
High-K board 116.6
RθJC(top) Junction-to-case (top) thermal resistance 71.6 °C/W
RθJB Junction-to-board thermal resistance 57.3 °C/W
ψJT Junction-to-top characterization parameter 28.3 °C/W
ψJB Junction-to-board characterization parameter 56.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: VCC1 and VCC2 = 5 V ± 10%

TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –4 mA; see Figure 16. VCCO(1)– 0.8 4.6 V
IOH = –20 μA; see Figure 16. VCCO– 0.1 5
VOL Low-level output voltage IOL = 4 mA; see Figure 16. 0.2 0.4 V
IOL = 20 μA; see Figure 16. 0 0.1
VI(HYS) Input threshold voltage hysteresis 400 mV
IIH High-level input current INx at 0 V or VCCI(1) 10 μA
IIL Low-level input current –10 μA
CMTI Common-mode transient immunity VI = VCCI or 0 V; see Figure 18. 25 50 kV/μs
SUPPLY CURRENT (ALL INPUTS SWITCHING WITH SQUARE WAVE CLOCK SIGNAL FOR DYNAMIC ICC MEASUREMENT)
ISO7420x
ICC1 Supply current for VCC1 and VCC2 DC to 1 Mbps DC Input: VI = VCCI or 0 V,
AC Input: CL = 15 pF		 0.4 0.8 mA
ICC2 3.4 5
ICC1 10 Mbps CL = 15 pF 0.6 1
ICC2 4.5 6
ICC1 25 Mbps 1 1.5
ICC2 6.2 8
ICC1 50 Mbps 1.7 2.5
ICC2 9 12
ISO7421x
ICC1 Supply current for VCC1 and VCC2 DC to 1 Mbps DC Input: VI = VCCI or 0 V,
AC Input: CL = 15 pF		 2.3 3.6 mA
ICC2 2.3 3.6
ICC1 10 Mbps CL = 15 pF 2.9 4.5
ICC2 2.9 4.5
ICC1 25 Mbps 4.3 6
ICC2 4.3 6
ICC1 50 Mbps 6 8.5
ICC2 6 8.5
(1) VCCI = Input-side VCC; VCCO = Output-side VCC

6.6 Electrical Characteristics: VCC1 = 5 V ± 10%, VCC2 = 3.3 V ± 10%

TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –4 mA; see Figure 16. ISO7421x (5-V side) VCC1 – 0.8 4.6 V
ISO7420x/7421x (3.3-V side) VCC2 - 0.4 3
IOH = –20 μA; see Figure 16, ISO7421x (5-V side) VCC1 – 0.1 5
ISO7420x/7421x (3.3-V side) VCC2 – 0.1 3.3
VOL Low-level output voltage IOL = 4 mA; see Figure 16. 0.2 0.4 V
IOL = 20 μA; see Figure 16. 0 0.1
VI(HYS) Input threshold voltage hysteresis 400 mV
IIH High-level input current INx at 0 V or VCCI 10 μA
IIL Low-level input current –10 μA
CMTI Common-mode transient immunity VI = VCCI or 0 V; see Figure 18. 25 50 kV/μs
SUPPLY CURRENT (ALL INPUTS SWITCHING WITH SQUARE WAVE CLOCK SIGNAL FOR DYNAMIC ICC MEASUREMENT)
ISO7420x
ICC1 Supply current for VCC1 and VCC2 DC to 1 Mbps DC Input: VI = VCCI or 0 V,
AC Input: CL = 15 pF		 0.4 0.8 mA
ICC2 2.6 3.7
ICC1 10 Mbps CL = 15 pF 0.6 1
ICC2 3.3 4.3
ICC1 25 Mbps 1 1.5
ICC2 4.4 5.6
ICC1 50 Mbps 1.7 2.5
ICC2 6.2 7.5
ISO7421x
ICC1 Supply current for VCC1 and VCC2 DC to 1 Mbps DC Input: VI = VCCI or 0 V,
AC Input: CL = 15 pF		 2.3 3.6 mA
ICC2 1.8 2.8
ICC1 10 Mbps CL = 15 pF 2.9 4.5
ICC2 2.2 3.2
ICC1 25 Mbps 4.3 6
ICC2 2.8 4.1
ICC1 50 Mbps 6 8.5
ICC2 3.8 5.5

6.7 Electrical Characteristics: VCC1 = 3.3 V ± 10%, VCC2 = 5 V ± 10%

TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –4 mA; see Figure 16. ISO7421x (3.3-V side) VCC1 – 0.4 3 V
ISO7420x/7421x (5-V side) VCC2 – 0.8 4.6
IOH = –20 μA; see Figure 16 ISO7421x (3.3-V side) VCC1 – 0.1 3.3
ISO7420x/7421x (5-V side) VCC2 – 0.1 5
VOL Low-level output voltage IOL = 4 mA; see Figure 16. 0.2 0.4 V
IOL = 20 μA; see Figure 16. 0 0.1
VI(HYS) Input threshold voltage hysteresis 400 mV
IIH High-level input current INx at 0 V or VCCI 10 μA
IIL Low-level input current –10 μA
CMTI Common-mode transient immunity VI = VCCI or 0 V; see Figure 18. 25 50 kV/μs
SUPPLY CURRENT (ALL INPUTS SWITCHING WITH SQUARE WAVE CLOCK SIGNAL FOR DYNAMIC ICC MEASUREMENT)
ISO7420x
ICC1 Supply current for VCC1 and VCC2 DC to 1 Mbps DC Input: VI = VCCI or 0 V,
AC Input: CL = 15 pF		 0.2 0.4 mA
ICC2 3.4 5
ICC1 10 Mbps CL = 15 pF 0.4 0.6
ICC2 4.5 6
ICC1 25 Mbps 0.6 0.9
ICC2 6.2 8
ICC1 50 Mbps 1 1.3
ICC2 9 12
ISO7421x
ICC1 Supply current for VCC2 and VCC2 DC to 1 Mbps DC Input: VI = VCCI or 0 V,
AC Input: CL = 15 pF		 1.8 2.8 mA
ICC2 2.3 3.6
ICC1 10 Mbps CL = 15 pF 2.2 3.2
ICC2 2.9 4.5
ICC1 25 Mbps 2.8 4.1
ICC2 4.3 6
ICC1 50 Mbps 3.8 5.5
ICC2 6 8.5

6.8 Electrical Characteristics: VCC1 and VCC2 = 3.3 V ± 10%

TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –4 mA; see Figure 16. VCCO(1) – 0.4 3 V
IOH = –20 μA; see Figure 16. VCCO – 0.1 3.3
VOL Low-level output voltage IOL = 4 mA; see Figure 16. 0.2 0.4 V
IOL = 20 μA; see Figure 16. 0 0.1
VI(HYS) Input threshold voltage hysteresis 400 mV
IIH High-level input current INx at 0 V or VCCI(1) 10 μA
IIL Low-level input current –10 μA
CMTI Common-mode transient immunity VI = VCCI or 0 V; see Figure 18. 25 50 kV/μs
SUPPLY CURRENT (ALL INPUTS SWITCHING WITH SQUARE WAVE CLOCK SIGNAL FOR DYNAMIC ICC MEASUREMENT)
ISO7420x
ICC1 Supply current for VCC1 and VCC2 DC to 1 Mbps DC Input: VI = VCCI or 0 V,
AC Input: CL = 15 pF		 0.2 0.4 mA
ICC2 2.6 3.7
ICC1 10 Mbps CL = 15 pF 0.4 0.6
ICC2 3.3 4.3
ICC1 25 Mbps 0.6 0.9
ICC2 4.4 5.6
ICC1 50 Mbps 1 1.3
ICC2 6.2 7.5
ISO7421x
ICC1 Supply current for VCC2 and VCC2 DC to 1 Mbps DC Input: VI = VCCI or 0 V,
AC Input: CL = 15 pF		 1.8 2.8 mA
ICC2 1.8 2.8
ICC1 10 Mbps CL = 15 pF 2.2 3.2
ICC2 2.2 3.2
ICC1 25 Mbps 2.8 4.1
ICC2 2.8 4.1
ICC1 50 Mbps 3.8 5.5
ICC2 3.8 5.5
(1) VCCI = Input-side VCC; VCCO = Output-side VCC

6.9 Power Dissipation Characteristics

THERMAL METRIC ISO742x UNIT
D (SOIC)
8 PINS
PD Device power dissipation VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF,
Input a 100-Mbps 50% duty-cycle square wave		 138 mW

6.10 Switching Characteristics: VCC1 and VCC2 = 5 V ± 10%

TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 16. 7 11 ns
PWD(1) Pulse width distortion |tPHL – tPLH| ISO7420x 0.2 3 ns
ISO7421x 0.3 3.7
tsk(o)(2) Channel-to-channel output skew time ISO7420x 0.3 1 ns
ISO7421x 0.3 2
tsk(pp)(3) Part-to-part skew time ISO7420x 3.7 ns
ISO7421x 4.9
tr Output signal rise time See Figure 16. 1.8 ns
tf Output signal fall time 1.7 ns
tfs Fail-safe output delay time from input power loss See Figure 17. 6 μs
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

6.11 Switching Characteristics: VCC1 = 5 V ± 10%, VCC2 = 3.3 V ± 10%

TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 16. 8 13.5 ns
PWD(1) Pulse width distortion |tPHL – tPLH| ISO7420x 0.3 3 ns
ISO7421x 0.5 5.6
tsk(o)(2) Channel-to-channel output skew time ISO7420x 1.5 ns
ISO7421x 0.5 3
tsk(pp)(3) Part-to-part skew time ISO7420x 5.4 ns
ISO7421x 6.3
tr Output signal rise time See Figure 16. 2 ns
tf Output signal fall time 2 ns
tfs Fail-safe output delay time from input power loss See Figure 17. 6 μs
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

6.12 Switching Characteristics: VCC1 = 3.3 V ± 10%, VCC2 = 5 V ± 10%

TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time ISO7420x See Figure 16. 7.5 12 ns
ISO7421x 7.5 14
PWD(1) Pulse width distortion |tPHL – tPLH| ISO7420x 0.7 3 ns
ISO7421x 0.7 3.6
tsk(o)(2) Channel-to-channel output skew time ISO7420x 0.5 1.5 ns
ISO7421x 0.5 3
tsk(pp)(3) Part-to-part skew time ISO7420x 4.6 ns
ISO7421x 8.5
tr Output signal rise time See Figure 16. 1.7 ns
tf Output signal fall time 1.6 ns
tfs Fail-safe output delay time from input power loss See Figure 17. 6 μs
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

6.13 Switching Characteristics: VCC1 and VCC2 = 3.3 V ± 10%

TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 16 8.5 14 ns
PWD(1) Pulse width distortion |tPHL – tPLH| ISO7420x and ISO7421x 0.5 2 ns
tsk(o)(2) Channel-to-channel output skew time ISO7420x 0.4 2 ns
ISO7421x 0.4 3
tsk(pp)(3) Part-to-part skew time ISO7420x 6.2 ns
ISO7421x 6.8
tr Output signal rise time See Figure 16 2 ns
tf Output signal fall time 1.8 ns
tfs Fail-safe output delay time from input power loss See Figure 17 6 μs
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

6.14 Typical Characteristics

ISO7420E ISO7420FE ISO7421E ISO7421FE icc_sr_llse45.gif Figure 1. ISO7420 Supply Current Per Channel vs Data Rate (No Load)
ISO7420E ISO7420FE ISO7421E ISO7421FE icc3_sr_llse45.gif Figure 3. ISO7420 Supply Current Per Channel vs Data Rate (15 pF Load)
ISO7420E ISO7420FE ISO7421E ISO7421FE sup_curr1_llse45.gif Figure 5. ISO7421 Supply Current Per Channel vs Data Rate (No Load)
ISO7420E ISO7420FE ISO7421E ISO7421FE sup_curr3_llse45.gif Figure 7. ISO7421 Supply Current Per Channel vs Data Rate (15 pF Load)
ISO7420E ISO7420FE ISO7421E ISO7421FE tpd_ta_llse45.gif Figure 9. Propagation Delay Time vs Free-Air Temperature
ISO7420E ISO7420FE ISO7421E ISO7421FE FS_ta_llse45.gif Figure 11. Input VCC Fail-Safe Voltage Threshold vs Free-Air Temperature
ISO7420E ISO7420FE ISO7421E ISO7421FE VOL_IOL_llse45.gif Figure 13. Low-Level Output Voltage vs Low-Level Output Current
ISO7420E ISO7420FE ISO7421E ISO7421FE out_jitter2_llse45.gif Figure 15. ISO7421FE Output Jitter vs Data Rate
ISO7420E ISO7420FE ISO7421E ISO7421FE icc2_sr_llse45.gif Figure 2. ISO7420 Supply Current Both Channels vs Data Rate (No Load)
ISO7420E ISO7420FE ISO7421E ISO7421FE icc4_sr_llse45.gif Figure 4. ISO7420 Supply Current Both Channels vs Data Rate (15 pF Load)
ISO7420E ISO7420FE ISO7421E ISO7421FE sup_curr2_llse45.gif Figure 6. ISO7421 Supply Current Both Channels vs Data Rate (No Load)
ISO7420E ISO7420FE ISO7421E ISO7421FE sup_curr4_llse45.gif Figure 8. ISO7421 Supply Current Both Channels vs Data Rate (15 pF Load)
ISO7420E ISO7420FE ISO7421E ISO7421FE tpd2_ta_llse45.gif Figure 10. Propagation Delay Time vs Free-Air Temperature
ISO7420E ISO7420FE ISO7421E ISO7421FE VOH_IOH_llse45.gif Figure 12. High-Level Output Voltage vs High-Level Output Current
ISO7420E ISO7420FE ISO7421E ISO7421FE out_jitter1_llse45.gif Figure 14. ISO7420FE Output Jitter vs Data Rate
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