ZHCSPK0 July   2022 ISOW7721

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. 说明(续)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics - Power Converter
    10. 7.10 Supply Current Characteristics - Power Converter
    11. 7.11 Electrical Characteristics Channel Isolator - VIO, VISOIN = 5-V
    12. 7.12 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 5-V
    13. 7.13 Electrical Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    14. 7.14 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    15. 7.15 Electrical Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    16. 7.16 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    17. 7.17 Electrical Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    18. 7.18 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    19. 7.19 Switching Characteristics - 5-V Supply
    20. 7.20 Switching Characteristics - 3.3-V Supply
    21. 7.21 Switching Characteristics - 2.5-V Supply
    22. 7.22 Switching Characteristics - 1.8-V Supply
    23. 7.23 Insulation Characteristics Curves
    24. 7.24 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Power Isolation
      2. 9.1.2 Signal Isolation
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Protection Features
      4. 9.3.4 Multi-Device Chaining for Increased Power Output
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
      4. 10.2.4 Insulation Lifetime
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 支持资源
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 术语表
  14. 14Mechanical, Packaging, and Orderable Information

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Pin Configuration and Functions

Figure 6-1 ISOW7721 DFM Package 20-Pin SOIC Top View
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
ISOW7721
EN_IO1 4 I Output Enable 1: When EN_IO1 is high or open then the channel output pin on side 1 is enabled. When EN_IO1 is low then the channel output pin on side 1 is in a high impedance state and the transmitter of the channel input pin on side 1 is disabled.
EN_IO2 17 I Output Enable 2: When EN_IO2 is high or open then the channel output pin on side 2 is enabled. When EN_IO2 is low then the channel output pin on side 2 is in a high impedance state and the transmitter of the channel input pin on side 2 is disabled.
GNDIO 6 Ground connection for VIO. GND1 and GNDIO need to be shorted on board.
GISOIN 15 Ground connection for VISOIN. GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead. See the Layout Section for more information.
GND1 10 Ground connection for VDD. GND1 and GNDIO needs to be shorted on board.
GND2 11 Ground connection for VISOOUT. GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead. See the Layout Section for more information.
INA 2 I Input channel A
INB 18 I Input channel B
CC 8 I/O Multiple device pimary/secondary synchronization pin.

When LF is set to GND1, CC is an output used to sync to an additional ISOW7721. When LF is set to VDD, CC is an input. Connect the CC pin of the primary device to all the secondary devices. Leave CC floating if unused.

See Section 9.3.4 for more information.

LF 7 I Multiple device primary/secondary control logic.

Connect the LF to GND1 when used as the primary device or to VDD if used as the secondary device. Tie LF to GND1 if used as a standalone device when not chaining the power converters.

See Section 9.3.4 for more information.

OUTA 19 O Output channel A
OUTB 3 O Output channel B
EN 5 I/O

Power converter enable input pin: enables and disables the integrated DC-DC power converter. Connect directly to microcontroller or through a series current limiting resistor to use as an enable input pin. DC-DC power converter is enabled when EN is high to the VIO voltage level and disabled when low at GND1 voltage level.

See Section 9.3.3 for more information

VSEL 13 I VISOOUT selection pin. VISOOUT = 5 V when VSEL shorted to VISOOUT. VISOOUT = 3.3 V, when VSEL shorted to GND2. For more information see the Device Functional Modes.
VIO 1 Side 1 logic supply.
VDD 9 Side 1 DC-DC converter power supply.
VISOIN 20 Side 2 supply voltage for isolation channels. VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead. See Section 10 for more information.
VISOOUT 12 Isolated power converter output voltage. VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead. See Section 10 for more information.