ZHCSLW9 November   2022 ISOW7741-Q1 , ISOW7742-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 说明（接续）
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics - Power Converter
    10. 7.10 Supply Current Characteristics - Power Converter
    11. 7.11 Electrical Characteristics Channel Isolator - VIO, VISOIN = 5-V
    12. 7.12 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 5-V
    13. 7.13 Electrical Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    14. 7.14 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    15. 7.15 Electrical Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    16. 7.16 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    17. 7.17 Electrical Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    18. 7.18 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    19. 7.19 Switching Characteristics - 5-V Supply
    20. 7.20 Switching Characteristics - 3.3-V Supply
    21. 7.21 Switching Characteristics - 2.5-V Supply
    22. 7.22 Switching Characteristics - 1.8-V Supply
    23. 7.23 Insulation Characteristics Curves
    24. 7.24 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Power Isolation
      2. 9.1.2 Signal Isolation
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Protection Features
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
      4. 10.2.4 Insulation Lifetime
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 支持资源
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 术语表
  14. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Option Addendum
      1. 14.1.1 Packaging Information
      2. 14.1.2 Tape and Reel Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.22 Switching Characteristics - 1.8-V Supply

VISOIN = 1.8 V ±5%, VIO = 1.8 V ±5%, GND1 = GNDIO, GND2 = GISOIN (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 8-1 7.5 15 21.5 ns
PWD Pulse width distortion(1) |tPHL – tPLH| 0 5.8 ns
ENIO_tPLH, ENIO_tPHL ENIO propagation delay time (opposite side) See Figure 8-2 243 475 ns
tsk(o) Channel-to-channel output skew time(2) Same-direction channels 4.1 ns
tsk(pp) Part-to-part skew time(3) 8.6 ns
tr Output signal rise time See Figure 8-1 1.9 3 ns
tf Output signal fall time 1.8 3 ns
tPHZ Channel disable propagation delay, high-to-high impedance output See Figure 8-2 260 410 ns
tPLZ Channel disable propagation delay, low-to-high impedance output 260 406 ns
tPZH Channel enable propagation delay, high impedance-to-high output for ISOW774x-Q1 240 444 ns
Channel enable propagation delay, high impedance-to-high output for ISOW774x-Q1 with F suffix 240 444 ns
tPZL Channel enable propagation delay, high impedance-to-low output for ISOW774x-Q1 237 439 ns
Channel enable propagation delay, high impedance-to-low output for ISOW774x-Q1 with F suffix 237 439 ns
tDO Default output delay time from input power loss Measured from the time VIO or VISOIN goes below 1.6 V at 10 mV/ns. See Figure 8-3 0.1 0.3 μs
tie Time interval error 216 – 1 PRBS data at 100 Mbps 0.7 ns
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.
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