ISOW77xx 器件系列是具有低辐射集成式高效电源转换器的电隔离四通道数字隔离器。集成式直流/直流转换器提供高达 550mW 的隔离式电源,无需在空间受限的隔离设计中使用单独的隔离式电源。
特性 |
ISOW774x ISOW774xF |
ISOW774xB ISOW774xFB |
---|---|---|
保护级别 | 增强型 | 基本型 |
浪涌测试电压 | 10kVPK | 7.8kVPK |
隔离额定值 | 5000VRMS | 5000VRMS |
工作电压 | 1000 VRMS/1500VPK | 1000 VRMS/1500VPK |
封装 | DFM (20) | DFM (20) |
封装尺寸(标称值) | 12.83 mm x 7.5 mm | 12.83 mm x 7.5 mm |
电源转换器可在 –40°C 至 +125°C 的宽工作环境温度范围内高效运行。该器件提供改进的发射性能,简化了电路板设计,并提供了铁氧体磁珠以进一步衰减发射。ISOW774x 设计时考虑了增强的保护功能,包括软启动来限制浪涌电流、过压和欠压锁定、EN/FLT 引脚上的故障检测、过载和短路保护以及热关机。
ISOW77xx 系列器件提供高电磁抗扰度,同时隔离 CMOS 或低电压互补金属氧化物半导体 (LVCMOS) 数字 I/O 。该信号隔离通道具有逻辑输入和输出缓冲器,由双电容二氧化硅 (SiO2) 绝缘栅隔开,而电源隔离则采用由薄膜聚合物隔开的片上变压器作为绝缘材料。四通道 ISOW77xx 有五种可订购的配置,器件型号的最后一位数字表示反向通道的数量。例如,ISOW7740 有 4 个正向通道和 0 个反向通道,而 ISOW7743 将有 1 个正向通道和 3 个反向通道。如果输入信号丢失,则不具有 F 后缀的 ISOW77xx 器件默认输出高电平,具有 F 后缀的 ISOW77xx 器件默认输出低电平。通过在PCB上将VIO 和 VDD连接在一起,ISOW774x 可在 3V 至 5.5V 的单一电源下运行。如果需要较低的逻辑电平,这些器件支持 1.71V 至 5.5V 逻辑电源 (VIO),该电源独立于 3V 至 5.5V 的电源转换器电源 (VDD) 。VISOIN 和 VISOOUT 需要通过铁氧体磁珠或通过 LDO 馈电连接到电路板。
这些器件有助于防止数据总线(例如,UART、SPI、RS-485、RS-232 和 CAN)或者其他电路上的噪声电流进入本地接地以及干扰或损坏敏感电路。通过创新的芯片设计和布线技术,该器件的电磁兼容性得到了显著增强,可缓解系统级 ESD、EFT 、浪涌和辐射合规性。器件采用 20 引脚 SOIC 宽体 (SOIC-WB) DFM 封装。
PIN | I/O | DESCRIPTION | |||||
---|---|---|---|---|---|---|---|
NAME | NO. | ||||||
ISOW7740 | ISOW7741 | ISOW7742 | ISOW7743 | ISOW7744 | |||
GNDIO | 6 | 6 | 6 | 6 | 6 | — | Ground connection for VIO. GND1 and GNDIO needs to be shorted on board. |
GND1 | 10 | 10 | 10 | 10 | 10 | — | Ground connection for VDD. GND1 and GNDIO needs to be shorted on board. |
GND2 | 11 | 11 | 11 | 11 | 11 | — | Ground connection for VISOOUT. GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead. See the Layout Section for more information. |
GISOIN | 15 | 15 | 15 | 15 | 15 | — | Ground connection for VISOIN. GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead. See the Layout Section for more information. |
INA | 2 | 2 | 2 | 2 | 19 | I | Input channel A |
INB |
3 |
3 |
3 |
18 | 18 | I | Input channel B |
INC |
4 |
4 |
17 |
17 |
17 |
I | Input channel C |
IND |
5 |
16 |
16 |
16 |
16 |
I | Input channel D |
OUTA | 19 | 19 | 19 | 19 | 2 | O | Output channel A |
OUTB | 18 | 18 |
18 |
3 |
3 |
O | Output channel B |
OUTC | 17 |
17 |
4 |
4 |
4 |
O | Output channel C |
OUTD | 16 | 5 | 5 | 5 | 5 | O | Output channel D |
EN_IO1 |
7 |
7 |
7 |
7 |
7 |
I |
Output Enable 1: When EN_IO1 is high or open then the channel output pins on side 1 are enabled. When EN_IO1 is low then the channel output pins on side 1 are in a high impedance state and the transmitter of the channel input pins on side 1 are disabled. |
EN_IO2 |
14 |
14 | 14 | 14 | 14 |
I |
Output Enable 2: When EN_IO2 is high or open then the channel output pins on side 2 are enabled. When EN_IO2 is low then the channel output pins on side 2 are in a high impedance state and the transmitter of the channel input pins on side 2 are disabled. |
EN/FLT |
8 |
8 |
8 |
8 |
8 |
I/O |
Multi-function power converter enable input pin or
fault output pin. Can only be used as either an input pin or an
output pin. Power converter enable input pin: enables and disables the integrated DC-DC power converter. Connect directly to microcontroller or through a series current limiting resistor to use as an enable input pin. DC-DC power converted is enabled when EN/FLT is high to the VIO voltage level and disabled when low at GND1 voltage level. Fault output pin: Alert signal if power converter is not operating properly. This pin is active low. Connect to microcontroller through a 5 kΩ or greater pull-up resistor in order to use as a fault outpin pin. See Section 9.3.3 for more information |
VSEL |
13 |
13 |
13 |
13 |
13 |
I |
VISOOUT selection pin. VISOOUT = 5 V when VSEL shorted to VISOOUT. VISOOUT = 3.3 V, when VSEL shorted to GND2. For more information see the Device Functional Modes. |
VIO | 1 | 1 | 1 | 1 | 1 | — | Side 1 logic supply. |
VDD |
9 |
9 |
9 |
9 |
9 |
— | Side 1 DC-DC converter power supply. |
VISOIN |
20 |
20 | 20 | 20 |
20 |
— | Side 2 supply voltage for isolation channels. VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead. See Section 10 for more information. |
VISOOUT |
12 |
12 |
12 |
12 |
12 |
— |
Isolated power converter output voltage. VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead. See Section 10 for more information. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VDD | Power converter supply voltage | –0.5 | 6 | V |
VISOIN | Isolated supply voltage, input supply for secondary side isolation channels | –0.5 | 6 | V |
VISOOUT | Isolated supply voltage, Power converter output VSEL shorted to GND2 |
–0.5 | 4 | V |
VISOOUT | Isolated supply voltage, Power converter output VSEL shorted to VISOOUT |
–0.5 | 6 | V |
VIO | Primary side logic supply voltage | –0.5 | 6 | V |
V | Voltage at INx, OUTx, EN_IOx(3) | –0.5 | VSI + 0.5 | V |
Voltage at EN/FLT | –0.5 | VSI + 0.5 | V | |
Voltage at VSEL | –0.5 | VISOOUT + 0.5 | V | |
IO | Maximum output current through data channels | –15 | 15 | mA |
TJ | Junction temperature | –40 | 150 | °C |
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) HBM ESD Classification Level 2 |
±3000 | V |
Charged-device model (CDM), per AEC Q100-011 CDM ESD Classification Level C6 |
±1500 | |||
Contact discharge per IEC 61000-4-2(2) Isolation barrier withstand test |
±8000 |
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
Power Converter | ||||||
VDD | Power converter supply voltage | 3.3 V operation | 2.97 | 3.3 | 3.63 | V |
5 V operation | 4.5 | 5 | 5.5 | V | ||
VDD(UVLO+) | Positive threshold when power converter supply is rising | Positive threshold when power converter supply is rising | 2.7 | 2.95 | V | |
VDD(UVLO-) | Positive threshold when power converter supply is falling | Positive threshold when power converter supply is falling | 2.40 | 2.55 | V | |
VDD(HYS) | Power converter supply voltage hysteresis | Power converter supply voltage hysteresis | 0.15 | V | ||
Channel Isolation | ||||||
VIO, VISOIN (3) | Channel logic supply voltage | 1.8 V operation | 1.71 | 1.89 | V | |
2.5 V, 3.3 V, and 5 V operation | 2.25 | 5.5 | V | |||
VIO(UVLO+) | Rising threshold of logic supply voltage | 1.55 | 1.7 | V | ||
VIO(UVLO-) | Falling threshold of logic supply voltage | 1.0 | 1.41 | V | ||
VIO(HYS) | Logic supply voltage hysteresis | 75 | mV | |||
IOH | High level output current(1) | VISOIN = 5 V | –4 | mA | ||
VISOIN = 3.3 V | –2 | mA | ||||
VISOIN = 2.5 V | –1 | mA | ||||
VISOIN = 1.8 V | –1 | mA | ||||
IOL | Low level output current(1) | VISOIN = 5 V | 4 | mA | ||
VISOIN = 3.3 V | 2 | mA | ||||
VISOIN = 2.5 V | 1 | mA | ||||
VISOIN = 1.8 V | 1 | mA | ||||
VIH | High-level input voltage(2) | 0.7 × VSI | VSI | V | ||
VIL | Low-level input voltage | 0 | 0.3 × VSI | V | ||
DR | Data rate | 100 | Mbps | |||
tPWRUP | Channel isolator ready after power up or EN/FLT high | VISOIN > VIO(UVLO+) | 5 | ms | ||
TA | Ambient temperature | –40 | 125 | °C |