ZHCSRC3A December 2022 – March 2024 IWRL6432
PRODUCTION DATA
The McSPI modules include the following main features:
Serial clock with programmable frequency, polarity, and phase for each channel
Wide selection of SPI word lengths, ranging from 4 to 32 bits
Up to four channels in controller mode, or single channel in receive mode
Controller multichannel mode:
Full duplex/half duplex
Transmit-only/receive-only/transmit-and-receive modes
Flexible input/output (I/O) port controls per channel
Programmable clock granularity
Per channel configuration for clock definition, polarity enabling, and word width
Single interrupt line for multiple interrupt source events
Enable the addition of a programmable start-bit for McSPI transfer per channel (start-bit mode)
Supports start-bit write command
Supports start-bit pause and break sequence
Programmable shift operations (1-32 bits)
Programmable timing control between chip select and external clock generation
Built-in FIFO available for a single channel