7.5.1.2 Extended SPI Transactions

A transaction can be extended to multiple registers by keeping the CSB pin asserted beyond the stated 16 clocks. In this mode, the register addresses increment automatically. The CSB pin must be asserted during 8 × (1+ N) clock cycles of SCLK, where N is the amount of bytes to write or read during the transaction.

During an extended read access, the SDO pin outputs register contents every 8 clock cycles after the initial 8 clocks of the command field. During an extended write access, the data is written to the registers every 8 clock cycles after the initial 8 clocks of the command field.

Extended transactions can be used to read 16 bits of proximity data and 24 bits of frequency data—all in one SPI transaction—by initiating a read from register 0x21.