7.3.7 Power Good Output (PGD)

The Power Good output (PGD) indicates when the voltage at the FB pin is close to the internal 2.51-V reference voltage. The rising threshold at the FB pin for the PGD output to switch high is 95% of the internal reference. The falling threshold for the PGD output to switch low is approximately 3.3% below the rising threshold.

The PGD pin is internally connected to the drain of an N-channel MOSFET switch. An external pull-up resistor (R_PGD), connected to an appropriate voltage not exceeding 7 V, is required at PGD to indicate the LM25011 status to other circuitry. When PGD is low, the pin voltage is determined by the current into the pin. See Figure 7, PGD Low Voltage vs Sink Current.

Upon powering up the LM25011, the PGD pin is high until the voltage at V_IN reaches 2 V, at which time PGD switches low. As V_IN is increased, PGD stays low until the output voltage takes the voltage at the FB pin above 95% of the internal reference voltage, at which time PGD switches high. As V_IN is decreased (during shutdown), PGD remains high until either the voltage at the FB pin falls below approximately 92% of the internal reference or when V_IN falls below its lower UVLO threshold, whichever occurs first. PGD then switches low, and remains low until V_IN falls below 2 V, at which time PGD switches high. If the LM25011 is used as a tracking regulator (see the Soft-Start section), the PGD output is high as long as the voltage at the FB pin is above the thresholds mentioned above.