ZHCS557J February 2010 – December 2015 LM25066
PRODUCTION DATA.
NOTE:
Solder exposed pad to ground.PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | ADR2 | SMBUS address line 2 | 3 - state address line. Should be left floating, or else direct connection (either trace or 0-Ω resistor) to VDD or GND. |
2 | ADR1 | SMBUS address line 1 | 3 - state address line. Should be left floating, or else direct connection (either trace or 0-Ω resistor) to VDD or GND. |
3 | ADR0 | SMBUS address line 0 | 3 - state address line. Should be left floating, or else direct connection (either trace or 0-Ω resistor) to VDD or GND. |
4 | VDD | Internal sub-regulator output | Internally sub-regulated 4.5 V bias supply. Connect a 1 µF capacitor on this pin to ground for bypassing. |
5 | CL | Current limit range | Connect this pin to GND to set the nominal overcurrent threshold at 25 mV. Connecting CL to VDD will set the overcurrent threshold to be 46 mV. |
6 | CB | Circuit breaker range | This pin sets the circuit breaker protection point in relation to the overcurrent trip point. When connected to GND, this pin will set the circuit breaker point to be 1.8 times the overcurrent threshold. Connecting this pin to VDD sets the circuit breaker trip point to be 3.6 times the overcurrent threshold. |
7 | FB | POWER GOOD feedback | An external resistor divider from OUT sets the output voltage at which the PGD pin switches. The threshold at the pin is 1.167 V. An internal 24 µA current source provides hysteresis. |
8 | RETRY | Fault retry input | This pin configures the power up fault retry behavior. When this pin is grounded, the device will continually try to engage power during a fault. If the pin is connected to VDD, the device will latch off during a fault. |
9 | TIMER | Timing capacitor | An external capacitor connected to this pin sets the insertion time delay, fault timeout period and restart timing. |
10 | PWR | Power limit set | An external resistor connected to this pin, in conjunction with the current sense resistor (RS), sets the maximum power dissipation allowed in the external series pass MOSFET. |
11 | PGD | POWER GOOD indicator | An open drain output. This output is high when the voltage at the FB pin is above 1.167 V and the input supply is within its undervoltage and overvoltage thresholds. Connect via a pullup resistor to the output rail (external MOSFET source) or any other voltage to be monitored. |
12 | OUT | Output feedback | Connect to the output rail (external MOSFET source). Internally used to determine the MOSFET VDS voltage for power limiting, and to monitor the output voltage. |
13 | GATE | Gate drive output | Connect to the external MOSFET's gate. |
14 | SENSE | Current sense input | The voltage across the current sense resistor (RS) is measured from VIN to this pin. If the voltage across RS reaches overcurrent threshold, the load current is limited and the fault timer activates. |
15 | VIN | Positive supply input | A small ceramic bypass capacitor close to this pin is recommended to suppress transients which occur when the load current is switched off. |
16 | UVLO/EN | Undervoltage lockout | An external resistor divider from the system input voltage sets the undervoltage turnon threshold. An internal 23-µA current source provides hysteresis. The enable threshold at the pin is 1.16 V. This pin can also be used for remote shutdown control. |
17 | OVLO | Overvoltage lockout | An external resistor divider from the system input voltage sets the overvoltage turnoff threshold. An internal 23-µA current source provides hysteresis. The disable threshold at the pin is 1.16 V. |
18 | GND | Circuit ground | – |
19 | SDA | SMBus data pin | Data pin for SMBus. Open-drain output, requires external pullup resistor to Vdd or other voltage source. |
20 | SCL | SMBus clock | Clock pin for SMBus. Open-drain output, requires external pullup resistor to Vdd or other voltage source. |
21 | SMBA | SMBus alert line | Alert pin for SMBus; active low. Open-drain output, requires external pullup resistor to Vdd or other voltage source. |
22 | VREF | Internal reference | Internally generated precision 2.73-V reference used for analog to digital conversion. Connect a 1-µF capacitor on this pin to ground for bypassing. |
23 | DIODE | External diode | Connect this to a diode-configured NPN transistor for temperature monitoring. Connect to ground if unused. |
24 | VAUX | Auxiliary voltage input | Auxiliary pin allows voltage telemetry from an external source. Full scale input of 1.16 V. |
– | Exposed Pad | Exposed pad of WQFN package | No internal electrical connections. Solder to the ground plane to reduce thermal resistance. |