7.3.4 Ramp Generator

The ramp signal of a pulse-width modulator with current mode control is typically derived directly from the buck switch drain current. This switch current corresponds to the positive slope portion of the inductor current signal. Using this signal for the PWM ramp simplifies the control loop transfer function to a single pole response and provides inherent input voltage feed-forward compensation. The disadvantage of using the buck switch current signal for PWM control is the large leading edge spike due to circuit parasitics. The leading edge spike must be filtered or blanked to avoid early termination of the PWM pulse. Also, the current measurement may introduce significant propagation delays. The filtering, blanking time, and propagation delay limit the minimal achievable pulse width. In applications where the input voltage may be relatively large in comparison to the output voltage, controlling a small pulse width is necessary for regulation. The LM25118 uses a unique ramp generator which does not actually measure the buck switch current but instead creates a signal representing or emulating the inductor current. The emulated ramp provides signal to the PWM comparator that is free of leading edge spikes and measurement or filtering delays. The current reconstruction is comprised of two elements: a sample-and-hold pedestal level and a ramp capacitor that is charged by a controlled current source. See Figure 13 for details.

The sample-and-hold pedestal level is derived from a measurement of the recirculating current through a current sense resistor in series with the recirculating diode of the buck regulator stage. A small value current-sensing resistor is required between the recirculating diode anode and ground. The CS and CSG pins should be Kelvin connected directly to the sense resistor. The voltage level across the sense resistor is sampled and held just prior to the onset of the next conduction interval of the buck switch. The current sensing and sample-and-hold provide the DC level of the reconstructed current signal. The sample and hold of the recirculating diode current is valid for both buck and buck-boost modes. The positive slope inductor current ramp is emulated by an external capacitor connected from the RAMP pin to the AGND and an internal voltage controlled current source. In buck mode, the ramp current source that emulates the inductor current is a function of the VIN and VOUT voltages per Equation 2.

Equation 2.

In buck-boost mode, the ramp current source is a function of the input voltage VIN, per Equation 3.

Equation 3.

Proper selection of the RAMP capacitor (C_RAMP) depends upon the value of the output inductor (L) and the current sense resistor (R_S). For proper current emulation, the sample and hold pedestal value and the ramp amplitude must have the same relative relationship to the actual inductor current. That is:

Equation 4.

where

• g_m is the ramp generator transconductance (5 µA/V)
• A is the current sense amplifier gain (10 V/V)

The ramp capacitor should be located very close to the device and connected directly to the RAMP and AGND pins.

The relationship between the average inductor current and the pedestal value of the sampled inductor current can cause instability in certain operating conditions. This instability is known as sub-harmonic oscillation, which occurs when the inductor ripple current does not return to its initial value by the start of the next switching cycle. Sub-harmonic oscillation is normally characterized by observing alternating wide and narrow pulses at the switch node. Adding a fixed slope voltage ramp (slope compensation) to the current sense signal prevents this oscillation. The 50 µA of offset current provided from the emulated current source adds enough slope compensation to the ramp signal for output voltages less than or equal to 12 V. For higher output voltages, additional slope compensation may be required. In such applications, the ramp capacitor can be decreased from the nominal calculated value to increase the ramp slope compensation.

The pedestal current sample is obtained from the current sense resistor (Rs) connected to the CS and CSG pins. It is sometimes helpful to adjust the internal current sense amplifier gain (A) to a lower value to obtain the higher current limit threshold. Adding a pair of external resistors RG in a series with CS and CSG as shown in Figure 14 reduces the current sense amplifier gain A according to Equation 5.

Equation 5.