ZHCS573I August   2010  – April 2018 LM25119

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      典型应用电路
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High Voltage Start-Up Regulator
      2. 7.3.2  UVLO
      3. 7.3.3  Enable 2
      4. 7.3.4  Oscillator and Sync Capability
      5. 7.3.5  Error Amplifiers and PWM Comparators
      6. 7.3.6  Ramp Generator
      7. 7.3.7  Current Limit
      8. 7.3.8  Hiccup Mode Current Limiting
      9. 7.3.9  Soft Start
      10. 7.3.10 HO and LO Output Drivers
      11. 7.3.11 Maximum Duty Cycle
      12. 7.3.12 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Diode Emulation
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Miscellaneous Functions
      2. 8.1.2 Interleaved Two-Phase Operation
      3. 8.1.3 Interleaved 4-Phase Operation
    2. 8.2 Typical Applications
      1. 8.2.1 Dual-output Design Example
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 External Components
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Timing Resistor
          2. 8.2.1.2.2  Output Inductor
          3. 8.2.1.2.3  Current Sense Resistor
          4. 8.2.1.2.4  Ramp Resistor and Ramp Capacitor
          5. 8.2.1.2.5  Output Capacitors
          6. 8.2.1.2.6  Input Capacitors
          7. 8.2.1.2.7  VCC Capacitor
          8. 8.2.1.2.8  Bootstrap Capacitor
          9. 8.2.1.2.9  Soft Start Capacitor
          10. 8.2.1.2.10 Restart Capacitor
          11. 8.2.1.2.11 Output Voltage Divider
          12. 8.2.1.2.12 UVLO Divider
          13. 8.2.1.2.13 MOSFET Selection
          14. 8.2.1.2.14 MOSFET Snubber
          15. 8.2.1.2.15 Error Amplifier Compensation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Two-Phase Design Example
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Switching Jitter Root Causes and Solutions
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 社区资源
    2. 11.2 商标
    3. 11.3 静电放电警告
    4. 11.4 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout Guidelines

The LM25119 consists of two integrated regulators operating almost independently. Crosstalk between the two regulators under certain conditions may be observed as switch jitter. This effect is common for any dual-channel regulator. Crosstalk effects are usually most severe when one channel is operating around 50% duty cycle. Careful layout practices help to minimize this effect. The following board layout guidelines apply specifically to the device and must be followed for best performance.

  • Maintain Loop1 and Loop2, shown in Figure 27, as small as possible
  • Maintain separate signal and power grounds
  • Place VCC capacitors (C6, C7) and VIN capacitor (C9) as closes as possible to the LM25119 device
  • Route CS and CSG traces together with Kelvin connection to the sense resistor
  • Connect AGND and PGND directly to the underside exposed pad
  • Ensure there are no high current paths beneath the underside exposed pad