ZHCSI85A May   2018  – July 2019 LM26420-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      LM26420 双路降压直流/直流转换器
      2.      LM26420 效率(高达 93%)
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions: 16-Pin WQFN
    2.     Pin Functions 20-Pin HTSSOP
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics Per Buck
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Power Good
      3. 7.3.3 Precision Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Overvoltage Protection
      2. 7.4.2 Undervoltage Lockout
      3. 7.4.3 Current Limit
      4. 7.4.4 Thermal Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Programming Output Voltage
      2. 8.1.2 VINC Filtering Components
      3. 8.1.3 Using Precision Enable and Power Good
      4. 8.1.4 Overcurrent Protection
    2. 8.2 Typical Applications
      1. 8.2.1 2.2-MHz, 0.8-V Typical High-Efficiency Application Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Inductor Selection
          3. 8.2.1.2.3 Input Capacitor Selection
          4. 8.2.1.2.4 Output Capacitor
          5. 8.2.1.2.5 Calculating Efficiency and Junction Temperature
        3. 8.2.1.3 Application Curves
      2. 8.2.2 2.2-MHz, 1.8-V Typical High-Efficiency Application Circuit
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 LM26420-Q12.2-MHz, 2.5-V Typical High-Efficiency Application Circuit
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Method 1: Silicon Junction Temperature Determination
      2. 10.3.2 Thermal Shutdown Temperature Determination
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 第三方米6体育平台手机版_好二三四免责声明
      2. 11.1.2 使用 WEBENCH® 工具创建定制设计
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Input Capacitor Selection

The input capacitors provide the AC current needed by the nearby power switch so that current provided by the upstream power supply does not carry a lot of AC content, generating less EMI. To the buck regulator in question, the input capacitor also prevents the drain voltage of the FET switch from dipping when the FET is turned on, therefore providing a healthy line rail for the LM26420-Q1 to work with. Because typically most of the AC current is provided by the local input capacitors, the power loss in those capacitors can be a concern. In the case of the LM26420-Q1 regulator, because the two channels operate 180° out of phase, the AC stress in the input capacitors is less than if they operated in phase. The measure for the AC stress is called input ripple RMS current. It is strongly recommended that at least one 10µF ceramic capacitor be placed next to each of the VIND pins. Bulk capacitors such as electrolytic capacitors or OSCON capacitors can be added to help stabilize the local line voltage, especially during large load transient events. As for the ceramic capacitors, use X7R or X5R types. They maintain most of their capacitance over a wide temperature range. Try to avoid sizes smaller than 0805. Otherwise significant drop in capacitance may be caused by the DC bias voltage. See Output Capacitor section for more information. The DC voltage rating of the ceramic capacitor should be higher than the highest input voltage.

Capacitor temperature is a major concern in board designs. While using a 10-µF or higher MLCC as the input capacitor is a good starting point, it is a good idea to check the temperature in the real thermal environment to make sure the capacitors are not overheated. Capacitor vendors may provide curves of ripple RMS current vs. temperature rise, based on a designated thermal impedance. In reality, the thermal impedance may be very different. So it is always a good idea to check the capacitor temperature on the board.

Because the duty cycles of the two channels may overlap, calculation of the input ripple RMS current is a little tedious — use Equation 14:

Equation 14. LM26420-Q1 30069624.gif

where

  • I1 is Channel 1's maximum output current
  • I2 is Channel 2's maximum output current
  • d1 is the non-overlapping portion of Channel 1's duty cycle D1
  • d2 is the non-overlapping portion of Channel 2's duty cycle D2
  • d3 is the overlapping portion of the two duty cycles.
  • Iav is the average input current

Iav= I1 × D1 + I2 × D2. To quickly determine the values of d1, d2 and d3, refer to the decision tree in Figure 36. To determine the duty cycle of each channel, use D = VOUT/VIN for a quick result or use the following equation for a more accurate result.

Equation 15. LM26420-Q1 30069625.gif

where

  • RDC is the winding resistance of the inductor.

Example:

VIN = 5 V, VOUT1 = 3.3 V, IOUT1 = 2 A, VOUT2 = 1.2 V, IOUT2 = 1.5 A, RDS = 170 mΩ, RDC = 30 mΩ. (IOUT1 is the same as I1 in the input ripple RMS current equation, IOUT2 is the same as I2).

First, find out the duty cycles. Plug the numbers into the duty cycle equation and we get D1 = 0.75, and D2 = 0.33. Next, follow the decision tree in Figure 36 to find out the values of d1, d2 and d3. In this case, d1 = 0.5, d2 = D2 + 0.5 – D1 = 0.08, and d3 = D1 – 0.5 = 0.25. Iav = IOUT1 × D1 + IOUT2 × D2 = 1.995 A. Plug all the numbers into the input ripple RMS current equation and the result is IIR(rms) = 0.77 A.

LM26420-Q1 30069681.pngFigure 36. Determining D1, D2, And D3