ZHCSIR2 September   2018 LM2735-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      典型的升压应用电路
      2.      效率与负载电流间的关系(VO = 12V)
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Theory of Operation
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Limit
      2. 7.3.2 Thermal Shutdown
      3. 7.3.3 Soft Start
      4. 7.3.4 Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable Pin and Shutdown Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1  LM2735X-Q1 SOT-23 Design Example 1
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Inductor Selection
          3. 8.2.1.2.3 Input Capacitor
          4. 8.2.1.2.4 Output Capacitor
          5. 8.2.1.2.5 Setting the Output Voltage
        3. 8.2.1.3 Application Curves
      2. 8.2.2  LM2735Y-Q1 SOT-23 Design Example 2
      3. 8.2.3  LM2735X-Q1 WSON Design Example 3
      4. 8.2.4  LM2735Y-Q1 WSON Design Example 4
      5. 8.2.5  LM2735X-Q1 SOT-23 Design Example 6
      6. 8.2.6  LM2735Y-Q1 SOT-23 Design Example 7
      7. 8.2.7  LM2735X-Q1 SOT-23 Design Example 8
      8. 8.2.8  LM2735Y-Q1 SOT-23 Design Example 9
      9. 8.2.9  LM2735X-Q1 WSON Design Example 10
      10. 8.2.10 LM2735Y-Q1 WSON Design Example 11
      11. 8.2.11 LM2735X-Q1 WSON SEPIC Design Example 12
      12. 8.2.12 LM2735X-Q1 SOT-23 LED Design Example 14
      13. 8.2.13 LM2735Y-Q1 WSON FlyBack Design Example 15
      14. 8.2.14 LM2735X-Q1 SOT-23 LED Design Example 16 VRAIL > 5.5 V Application
      15. 8.2.15 LM2735X-Q1 SOT-23 LED Design Example 17 Two-Input Voltage Rail Application
      16. 8.2.16 SEPIC Converter
        1. 8.2.16.1 Detailed Design Procedure
          1. 8.2.16.1.1 SEPIC Design Guide
          2. 8.2.16.1.2 Small Ripple Approximation
          3. 8.2.16.1.3 Steady State Analysis With Loss Elements
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 WSON Package
    2. 10.2 Layout Examples
    3. 10.3 Thermal Considerations
      1. 10.3.1 Definitions
      2. 10.3.2 PCB Design With Thermal Performance in Mind
      3. 10.3.3 LM2735-Q1 Thermal Models
      4. 10.3.4 Calculating Efficiency, and Junction Temperature
        1. 10.3.4.1 Example Efficiency Calculation
      5. 10.3.5 Calculating RθJA and RΨJC
        1. 10.3.5.1 Procedure
        2. 10.3.5.2 Example From Previous Calculations
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 第三方米6体育平台手机版_好二三四免责声明
    2. 11.2 使用 WEBENCH® 工具创建定制设计方案
    3. 11.3 文档支持
      1. 11.3.1 相关文档
    4. 11.4 接收文档更新通知
    5. 11.5 社区资源
    6. 11.6 商标
    7. 11.7 静电放电警告
    8. 11.8 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Calculating Efficiency, and Junction Temperature

The complete LM2735-Q1 DC/DC converter efficiency (η) can be calculated in the following manner.

Equation 30. LM2735-Q1 20215845.gif

Power loss (PLOSS) is the sum of two types of losses in the converter, switching and conduction. Conduction losses usually dominate at higher output loads, where as switching losses remain relatively fixed and dominate at lower output loads.

Losses in the LM2735-Q1 device:

Equation 31. PLOSS = PCOND + PSW + PQ

Conversion ratio of the boost converter with conduction loss elements inserted:

Equation 32. LM2735-Q1 20215846.gif

If the loss elements are reduced to zero, the conversion ratio simplifies to:

Equation 33. LM2735-Q1 20215847.gif

And this is known:

Equation 34. LM2735-Q1 20215848.gif

Therefore:

Equation 35. LM2735-Q1 20215849.gif

Calculations for determining the most significant power losses are discussed below. Other losses totaling less than 2% are not discussed.

A simple efficiency calculation that takes into account the conduction losses is shown below:

Equation 36. LM2735-Q1 20215850.gif

The diode, NMOS switch, and inductor DCR losses are included in this calculation. Setting any loss element to zero simplifies the equation.

VD is the forward voltage drop across the Schottky diode. It can be obtained from the manufacturer’s Electrical Characteristics section of the data sheet.

The conduction losses in the diode are calculated as follows:

Equation 37. PDIODE = VD × IO

Depending on the duty cycle, this can be the single most significant power loss in the circuit. Take care to choose a diode that has a low forward voltage drop. Another concern with diode selection is reverse leakage current. Depending on the ambient temperature and the reverse voltage across the diode, the current being drawn from the output to the NMOS switch during time D could be significant, this may increase losses internal to the LM2735-Q1 and reduce the overall efficiency of the application. See the data sheets of the Schottky diode manufacturer for reverse leakage specifications; and, typical applications within this data sheet for diode selections.

Another significant external power loss is the conduction loss in the input inductor. The power loss within the inductor can be simplified to:

Equation 38. PIND = IIN2RDCR
Equation 39. LM2735-Q1 20215851.gif

The LM2735-Q1 conduction loss is mainly associated with the internal NFET:

Equation 40. PCOND-NFET = I2SW-rms × RDSON × D
LM2735-Q1 20215852.gifFigure 47. LM2735-Q1 Switch Current
Equation 41. LM2735-Q1 20215853.gif (small ripple approximation)
Equation 42. PCOND-NFET = IIN2 × RDSON × D
Equation 43. LM2735-Q1 20215854.gif

The value for should be equal to the resistance at the junction temperature you wish to analyze. As an example, at 125°C and VIN = 5 V, RDSON = 250 mΩ (see Typical Characteristics for value).

Switching losses are also associated with the internal NMOS switch. They occur during the switch on and off transition periods, where voltages and currents overlap resulting in power loss.

The simplest means to determine this loss is to empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node:

Equation 44. PSWR = 1/2(VOUT × IIN × FSW × TRISE)
Equation 45. PSWF = 1/2(VOUT × IIN × FSW × TFALL)
Equation 46. PSW = PSWR + PSWF

Table 2. Typical Switch-Node Rise and Fall Times

VIN VOUT TRISE TFALL
3 V 5 V 6 nS 4 nS
5 V 12 V 6 nS 5 nS
3 V 12 V 7 nS 5 nS
5 V 18 V 7 nS 5 nS

Quiescent power losses: IQ is the quiescent operating current, and is typically around 4 mA

Equation 47. PQ = IQ × VIN