10.1 Layout Guidelines

When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The most important consideration when completing the layout is the close coupling of the GND connections of the C_IN capacitor and the catch diode D1. These ground ends should be close to one another and be connected to the GND plane with at least two through-holes. Place these components as close to the IC as possible. Next in importance is the location of the GND connection of the C_OUT capacitor, which should be near the GND connections of C_IN and D1.

There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching node island.

The FB pin is a high impedance node and care should be taken to make the FB trace short to avoid noise pickup and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the GND of R2 placed as close as possible to the GND of the IC. The V_OUT trace to R1 should be routed away from the inductor and any other traces that are switching.

High AC currents flow through the V_IN, SW and V_OUT traces, so they should be as short and wide as possible. However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated noise can be decreased by choosing a shielded inductor.

The remaining components should also be placed as close as possible to the IC. Please see Application Note AN-1229 SNVA054 for further considerations and the LM2736 device demo board as an example of a four-layer layout.

10.2 Layout Example

Figure 31. Top Layer

Figure 32. Layout Schematic