ZHCS547K January 2010 – February 2018 LM27402
PRODUCTION DATA.
The useful operating temperature range of a PWM controller with integrated gate drivers and bias supply LDO regulator is greatly affected by:
In order for a PWM controller to be useful over a particular temperature range, the package must allow for the efficient removal of the heat produced while keeping the junction temperature within rated limits. The LM27402 controller is available in small 4-mm × 4-mm WQFN-24 (RUM) and 4.4-mm × 5-mm HTSSOP-16 (PWP) PowerPAD™ packages to cover a range of application requirements. The thermal metrics of these packages are summarized in the Thermal Information section of this datasheet. For detailed information regarding the thermal information table, please refer to IC Package Thermal Metrics, SPRA953, application report.
Both package offers a means of removing heat from the semiconductor die through the exposed thermal pad at the base of the package. While the exposed pad of the LM27402's package is not directly connected to any leads of the package, it is thermally connected to the substrate of the device (ground). This allows a significant improvement in heat-sinking, and it becomes imperative that the PCB is designed with thermal lands, thermal vias, and a ground plane to complete the heat removal subsystem. The LM27402's exposed pad is soldered to the ground-connected copper land on the PCB directly underneath the device package, reducing the thermal resistance to a very low value.
Numerous vias with a 0.3-mm diameter connected from the thermal land to the internal/solder-side ground plane(s) are vital to help dissipation. In a multi-layer PCB design, a solid ground plane is typically placed on the PCB layer below the power components. Not only does this provide a plane for the power stage currents to flow but it also represents a thermally conductive path away from the heat generating devices.
The thermal characteristics of the MOSFETs also are significant. The high-side MOSFET's drain pad is normally connected to a VIN plane for heat-sinking. The low-side MOSFET's drain pad is tied to the SW plane, but the SW plane area is purposely kept relatively small to mitigate EMI concerns.