11.1 Layout Guidelines

The performance of any switching converter depends as much upon the layout of the PCB as the component selection. Following a few simple guidelines will maximimize noise rejection and minimize the generation of EMI within the circuit.

Discontinuous currents are the most likely to generate EMI, therefore take care when routing these paths. The main path for discontinuous current in the LM3409/09HV buck converter contains the input capacitor (C_IN), the recirculating diode (D1), the P-channel MOSFET (Q1), and the sense resistor (R_SNS). This loop should be kept as small as possible and the connections between all three components should be short and thick to minimize parasitic inductance. In particular, the switch node (where L1, D1 and Q1 connect) should be just large enough to connect the components without excessive heating from the current it carries.

The IADJ, COFF, CSN and CSP pins are all high-impedance control inputs which couple external noise easily, therefore the loops containing these high impedance nodes should be minimized. The most sensitive loop contains the sense resistor (R_SNS) which should be placed as close as possible to the CSN and CSP pins to maximize noise rejection. The off-time capacitor (C_OFF) should be placed close to the COFF and GND pins for the same reason. Finally, if an external resistor (R_EXT) is used to bias the IADJ pin, it should be placed close to the IADJ and GND pins, also.

In some applications the LED or LED array can be far away (several inches or more) from the LM3409/09HV, or on a separate PCB connected by a wiring harness. When an output capacitor is used and the LED array is large or separated from the rest of the converter, the output capacitor should be placed close to the LEDs to reduce the effects of parasitic inductance on the AC impedance of the capacitor.

11.2 Layout Example

Figure 34. Layout Recommendation