8.3.12 PWM Dimming

The active low nDIM pin can be driven with a PWM signal which controls the main N-channel FET and the dimming FET (dimFET). The brightness of the LEDs can be varied by modulating the duty cycle of this signal. LED brightness is approximately proportional to the PWM signal duty cycle, (that is, 30% duty cycle equals approximately 30% LED brightness). This function can be ignored if PWM dimming is not required by using nDIM solely as a V_IN UVLO input as described in Input Undervoltage Lockout (UVLO) or by tying it directly to V_CC or V_IN.

Figure 24. PWM Dimming Circuit

STOPPED DD EDITING HERELM3421-Q1 and LM3423-Q1

Figure 24 shows how the PWM signal is applied to nDIM:

1. Connect the dimming MOSFET (Q_DIM) with the drain to the nDIM pin and the source to AGND. Apply an external logic-level PWM signal to the gate of Q_DIM.
2. Connect the anode of a Schottky diode (D_DIM) to the nDIM pin. Apply an inverted external logic-level PWM signal to the cathode of the same diode.

The DDRV pin is a PWM output that follows the nDIM PWM input signal. When the nDIM pin rises, the DDRV pin rises and the PWM latch reset signal is removed allowing the main MOSFET Q1 to turn on at the beginning of the next clock set pulse. In boost and buck-boost topologies, the DDRV pin is used to control a N-channel MOSFET placed in series with the LED load, while it would control a P-channel MOSFET in parallel with the load for a buck topology.

The series dimFET opens the LED load, when nDIM is low, effectively speeding up the rise and fall times of the LED current. Without any dimFET, the rise and fall times are limited by the inductor slew rate and dimming frequencies above 1 kHz are impractical. Using the series dimFET, dimming frequencies up to 30 kHz are achievable. With a parallel dimFET (buck topology), even higher dimming frequencies are achievable.

When using the PWM functionality in a boost regulator, the PWM signal can drive a ground referenced FET. However, with buck-boost and buck topologies, level shifting circuitry is necessary to translate the PWM dim signal to the floating dimFET as shown in Figure 25 and Figure 26. If high side dimming is necessary in a boost regulator using the LM3423-Q1, level shifting can be added providing the polarity inverting DPOL pin is pulled low (see LM3423-Q1 Only: DPOL, FLT, TIMR, and LRDY section) as shown in Figure 27.

When using a series dimFET to PWM dim the LED current, more output capacitance is always better. Typical applications use a minimum of 40 µF for PWM dimming. For most applications, a capacitance of 40 µF provides adequate energy storage at the output when the dimFET turns off and opens the LED load. Then when the dimFET is turned back on, the capacitance helps source current into the load, improving the LED current rise time.

A minimum on-time must be maintained in order for PWM dimming to operate in the linear region of its transfer function. Because the controller is disabled during dimming, the PWM pulse must be long enough such that the energy intercepted from the input is greater than or equal to the energy being put into the LEDs. For boost and buck-boost regulators, the minimum dimming pulse length in seconds (t_PULSE) is:

Equation 29.

Even maintaining a dimming pulse greater than t_PULSE, preserving linearity at low dimming duty cycles is difficult.

The second helpful modification is to remove the C_FS capacitor and R_FS resistor, eliminating the high-frequency compensation pole. Typically, this does not affect stability, but it speeds up the response of the CSH pin, specifically at the rising edge of the LED current when PWM dimming, thus improving the achievable linearity at low dimming duty cycles.

Figure 25. Buck-boost Level-Shifted PWM Circuit

Figure 26. Buck Level-Shifted PWM Circuit

Figure 27. Boost Level-Shifted PWM Circuit