8.3.13 LM3423 Only: DPOL, FLT, TIMR, and LRDY

The LM3423 has four additional pins: DPOL, FLT, TIMR, and LRDY. The DPOL pin is simply used to invert the DDRV polarity . If DPOL is left open, then it is internally pulled high and the polarity is correct for driving a series N-channel dimFET. If DPOL is pulled low then the polarity is correct for using a series P-channel dimFET in high-side dimming applications. For a parallel P-channel dimFET, as used in the buck topology, leave DPOL open for proper polarity.

The additional TIMR and FLT pins can be used in conjunction with an input disconnect MOSFET switch as shown in Figure 28 to protect the module from various fault conditions.

A fault is detected and an 11.5 µA (typical) current is sourced from the TIMR pin whenever any one of the following conditions exists.

• LED current is above regulation by more than 30%.
• OVLO has engaged.
• Thermal shutdown has engaged.

An external capacitor (C_TMR) from TIMR to AGND programs the fault filter time as follows:

Equation 30.

When the voltage on the TIMR pin reaches 1.24 V, the device is latched off and the N-channel MOSFET open-drain FLT pin transitions to a high impedance state. The controller immediatly pulls the TIMR pin to ground (resets) if the fault condition is removed at any point during the filter period. Otherwise, if the timer expires, the fault remains latched until one of these situations occurs:

• The EN pin is pulled low long enough for the V_CC pin to drop below 4.1 V (approximately 200 ms) or
• the TIMR pin is pulled to ground or
• a complete power cycle occurs

When using the EN and OVP pins in conjunction with the RPD pulldown pin, a race condition exists when exiting the disabled (EN low) state. When disabled, controller pulls up the OVP pin to the output voltage because the RPD pulldown is disabled, and this appears as if it is a real OVLO condition. The timer pin immediately rises and latches the controller to the fault state. To protect against this behavior, a minimum timer capacitor (C_TMR = 220 pF) should be used. If fault latching is not required, short the TMR pin to AGND, which disables the FLT flag function.

The LM3423 also includes an LED Ready (LRDY) flag to notify the system that the LEDs are in proper regulation. The N-channel MOSFET open-drain LRDY pin is pulled low whenever any of the following conditions are met:

1. V_CC UVLO has engaged.
2. LED current is below regulation by more than 20%.
3. LED current is above regulation by more than 30%.
4. Overvoltage protection has engaged
5. Thermal shutdown has engaged.
6. A fault has latched the device off.

The LRDY pin is pulled low during start-up of the device and remains low until the LED current is in regulation.

Figure 28. Fault Detection and LED Status Circuit