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SNVS569C May 2009 – October 2016 LM3550

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NHU|20
- MPQS001

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾⁽³⁾

	MIN	MAX	UNIT
V_IN to GND	–0.3	6	V
V_OUT, LED−, FB to GND	–0.3	6	V
SDA, SCL, STROBE, FET_CON, EOC, ALD/TEMP, IND to GND	–0.3	6	V
Continuous power dissipation⁽⁴⁾	Internally limited
Junction temperature, T_J-MAX		150	°C
Storage temperature, T_stg	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to the potential at the GND pin.

(3) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications.

(4) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T_J = 145°C (typical) and disengages at T_J = 125°C (typical). The thermal shutdown is specified by design.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Machine model⁽²⁾	±200	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) The LED pin has a machine model ESD rating of 150 V.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

	MIN	MAX	UNIT
Input voltage	2.7	5.5	V
Junction temperature, T_J	–30	125	°C
Ambient temperature, T_A	–30	85	°C

(1) All voltages are with respect to the potential at the GND pin.

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM3550	UNIT
		NHU (UQFN)
		16 PINS
R_θJA	Junction-to-ambient thermal resistance	60.1	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	30.5	°C/W
R_θJB	Junction-to-board thermal resistance	28.1	°C/W
ψ_JT	Junction-to-top characterization parameter	0.7	°C/W
ψ_JB	Junction-to-board characterization parameter	28.3	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	17.8	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

Typical imits are for T_J = 25°C; minimum and maximum limits apply over the full ambient junction temperature range (−30°C ≤ T_A ≤ 85°C). Unless otherwise noted, specifications apply to Typical Application with: : V_IN = 3.6 V, C_IN = 4.7 µF, C_OUT = 2.2 µF, C₁ = C₂ = 1 µF.⁽¹⁾⁽²⁾

PARAMETER		TEST CONDITION		MIN⁽³⁾	TYP	MAX⁽³⁾	UNIT
I_LED–	Current sink accuracy	2.7 V ≤ V_IN ≤ 5.5 V 3 V ≤ V_IN ≤ 5.5 V		54	60	66	mA
				90	100	110
				180	200	220
V_OVP	Output overvoltage protection	2.7 V ≤ V_IN ≤ 5.5 V	Going into OVP		5.3	5.479	V
V_OVP	Output overvoltage protection	2.7 V ≤ V_IN ≤ 5.5 V	Hysteresis		0.2		V
V_OUT	Output voltage regulation	2.7 V ≤ V_IN ≤ 5.5 V, I_OUT = 0 mA		4.275	4.5	4.666	V
				4.75	5	5169
				5.035	5.3	5.479
V_BAL	BAL pin voltage regulation	2.7 V ≤ V_IN ≤ 5.5 V			V_OUT / 2
I_IND	IND pin current regulation	2.7 V ≤ V_IN ≤ 5.5 V, V_IND = 2 V		3.3	4.8	6.3	mA
ƒ_SW	Switching frequency	2.7 V ≤ V_IN ≤ 5.5 V		0.882	1	1.153	MHz
V_FB	FEEDBACK pin regulation voltage	2.7 V ≤ V_IN ≤ 5.5 V, V_OUT = 4.6 V		94	100	106	mV
V_ALD/TEMP	ALD/TEMP pin reference voltage	2.7 V ≤ V_IN ≤ 5.5 V		095	1	1.05	V
V_EOC	EOC pin output logic load	I_LOAD = 3 mA				400	mV
I_IN-CL	Input current limit	V_OUT = 0 V			534	610	mA
I_SD	Shutdown supply current	Device disabled, 2.7 V ≤ V_IN ≤ 5.5 V			1.8	4	µA
I_Q	Quiescent supply current	2.7 V ≤ V_IN ≤ 5.5 V, I_OUT = 0 mA 5-V charge mode, non switching			168	240	µA
V_STROBE	STROBE logic thresholds	2.7 V ≤ V_IN ≤ 5.5 V	High	1.23		V_IN	V
V_STROBE	STROBE logic thresholds	2.7 V ≤ V_IN ≤ 5.5 V	Low	0		0.7	V
I²C-COMPATIBLE VOLTAGE SPECIFICATIONS (SCL, SDA)
V_IL	Input logic low	2.7 V ≤ V_IN ≤ 5.5 V		0		0.7	V
V_IH	Input logic high	2.7 V ≤ V_IN ≤ 5.5 V		1.23		V_IN	V
V_OL	Output logic low	I_LOAD = 3 mA				400	mV

(1) All voltages are with respect to the potential at the GND pin.

(2) Junction-to-ambient thermal resistance (R_θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm × 76 mm × 1.6 mm with a 2 × 1 array of thermal vias. The ground plane on the board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/18 µm/18 µm/36 µm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1 W.

(3) Minimum (MIN) and maximum (MAX) limits are specified by design, test, or statistical analysis. Typical (TYP) numbers are not ensured, but do represent the most likely norm. Unless otherwise specified, conditions for TYP specifications are: V_IN = 3.6 V and T_A = 25°C.

6.6 Timing Requirements

		MIN	UNIT
t1	SCK (clock period)	294	ns
t2	Data in setup time to SCL high, ƒ_SCL = 400 kHz	100	ns
t3	Data out stable after SCL low, ƒ_SCL = 400 kHz	0	ns
t4	SDA low setup time to SCL low (start), f_SCL = 400 kHz	100	ns
t5	SDA igh hold time after SCL high (stop), f_SCL = 400 kHz	100	ns

Figure 1. LM3550 Timing

6.7 Typical Characteristics

Unless otherwise specified: T_A = 25°C; V_IN = 3.6 V; C_IN = 4.7 µF, C_OUT = 2.2 µF, C1 = C2 = 1 µF. Super capacitor = 0.5 F TDK EDLC272020-501-2F-50.