SNVSCV4 September   2024 LM3645

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power Amplifier Synchronization (TORCH/TX)
      2. 6.3.2 Input Voltage Flash Monitor (IVFM)
      3. 6.3.3 Fault/Protections
        1. 6.3.3.1  Fault Operation
        2. 6.3.3.2  Flash Time-Out
        3. 6.3.3.3  Overvoltage Protection (OVP)
        4. 6.3.3.4  Current Limit
        5. 6.3.3.5  NTC Thermistor Input/Outputs (TEMP1, TEMP2)
        6. 6.3.3.6  Thermal Scale Back
        7. 6.3.3.7  Thermal Shutdown (TSD)
        8. 6.3.3.8  Undervoltage Lockout (UVLO)
        9. 6.3.3.9  LED and/or VOUT Short Fault
        10. 6.3.3.10 Fault Behavior Table
    4. 6.4 Device Functioning Modes
      1. 6.4.1 Flash Mode
      2. 6.4.2 Torch Mode
      3. 6.4.3 IR Mode
      4. 6.4.4 Voltage Mode
      5. 6.4.5 Mode Transitions
      6. 6.4.6 Boost Operation
        1. 6.4.6.1 Start-Up (Enabling The Device)
        2. 6.4.6.2 Pass Mode
        3. 6.4.6.3 Output Voltage Regulation
    5. 6.5 Programming and Control
      1. 6.5.1 Dx_EN Bits
      2. 6.5.2 STR1 and STR2 Usage
      3. 6.5.3 TOR/TX Usage
      4. 6.5.4 Control State Diagram
      5. 6.5.5 I2C-Compatible Interface
        1. 6.5.5.1 Data Validity
        2. 6.5.5.2 Start and Stop Conditions
        3. 6.5.5.3 Transferring Data
        4. 6.5.5.4 I2C-Compatible Chip Address
    6. 6.6 Register Descriptions
      1. 6.6.1 MainReg Registers
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Output Control Examples
        1. 7.2.2.1 Four Channel Flash with Strobe1 Trigger Starting in Standby
        2. 7.2.2.2 Four Channel Flash with Strobe1 Trigger Starting in I2C Torch
        3. 7.2.2.3 Mixed Mode Functionality
        4. 7.2.2.4 Voltage Mode Only
        5. 7.2.2.5 Voltage Mode With Advanced IR
      3. 7.2.3 Detailed Design Procedure
        1. 7.2.3.1 Snubber Requirement
        2. 7.2.3.2 Output Capacitor Selection
        3. 7.2.3.3 Input Capacitor Selection
        4. 7.2.3.4 Inductor Selection
      4. 7.2.4 Application Curves
  9. Power Supply Recommendations
  10. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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NTC Thermistor Input/Outputs (TEMP1, TEMP2)

The TEMP1 and TEMP2 pins serve as a threshold detector and bias source for negative temperature coefficient (NTC) thermistors. When the voltage at TEMPx goes below the programmed threshold, the LM3645 device transitions into one of these three modes:

  • Force standby mode
  • Force torch mode
  • Report only mode (bits [5:2] in reg 0x0D)

The device allows adjustment of the NTC threshold voltage from 250 mV to 1 V in 50 mV steps (bits [7:0] in reg 0x0F). Additionally, the NTC1 and NTC2 voltage levels provide an indicator of the remotely sensed temperature. The NTC bias current is adjustable in 25 µA steps from 25 µA to 100 µA (bits [7:6] in reg 0x0D). The NTC1 and NTC2 detection circuitry can be enabled or disabled via the NTC_MODE Register (bits [1:0] in reg 0x0D). If enabled, the NTC block turns on and off during the start and stop of a Flash/Torch/IR event.

Additionally, the NTC input looks for an open NTC connection and a shorted NTC connection. If the NTC input falls below 100 mV, the NTC short flag is set, and the device is disabled (bits [7:6] in reg 0x16). If the NTC input rises above 2.0 V, the NTC Open flag is set, and the device is disabled (bits [5:4] in reg 0x16). These fault detections can be individually disabled or enabled via the NTC Open Fault Enable bit (bits [2] in reg 0x13) and the NTC Short Fault Enable bit (bit [0] in reg 0x13).

LM3645 Temp Detection DiagramFigure 6-3 Temp Detection Diagram

To further extend the functionality of the NTC inputs, the voltage on both TEMP1 and TEMP2 can be read back to provide real time feedback regarding the temperature at the point of detection (bits [7:0] in reg 0x10). When either TEMP1 or TEMP2 pin is enabled, a 4-bit ADC is enabled and continually updates the NTC Voltage Register. The voltage on both TEMP1 and TEMP2 are measured if either NTC detection block is enabled. In this case, the data read into the NTC voltage register for the disabled TEMP detection block can be random and can be ignored. Only enabled TEMP blocks yield accurate readings.

Each NTC block can be associated with any of the four outputs. Each Dx Output should only be assigned to one of the NTC detection blocks.

LM3645 NTC Detection DiagramFigure 6-4 NTC Detection Diagram